Patents by Inventor Kenji Ohtani

Kenji Ohtani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955919
    Abstract: An electric motor system includes a battery, an inverter, an electric motor, a zero-phase switching arm and a control unit. The inverter converts DC power output from the battery into three-phase AC power and outputs the three-phase AC power to the electric motor. A rotor of the electric motor rotates by the three-phase AC power output from the inverter. A neural point of the electric motor is connected to the zero-phase switching arm. A zero-phase current flowing through respective windings of the electric motor is adjusted by switching of the zero-phase switching arm. By this means, in the electric motor system, torque is generated at the rotor also using the zero-phase current as well as a three-phase AC current flowing through the respective windings.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: April 9, 2024
    Assignee: DENSO CORPORATION
    Inventors: Makoto Taniguchi, Kazunari Moriya, Kenji Hiramoto, Hideo Nakai, Yuuko Ohtani, Shinya Urata, Masafumi Namba
  • Patent number: 11929054
    Abstract: An object of the present invention is to provide a soundproof material having a practically useful high-level sound absorption coefficient that while maintaining thinness, and further having an expanded sound-absorbable frequency region. A means for solving the problem is a soundproof material comprising: a surface cover layer composed of a fiber material; a back-surface layer laminated onto the surface cover layer, and composed of a porous material with voids interconnected with each other; and a joining layer laminated between the surface cover layer and the back-surface layer, and composed of a joining material, wherein the fiber material has an average fiber diameter of 1 to 10 ?m and an air-permeation volume of 5 to 200 cm3/cm2·sec, and wherein the joining layer has a joint area percentage of 50 to 95% with respect to the entire surface where the surface cover layer and the back-surface layer face each other.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: March 12, 2024
    Assignee: MAXELL, LTD.
    Inventors: Norikazu Matsumoto, Shoko Sakai, Kenji Ohtani, Teruhisa Miyata
  • Publication number: 20220076653
    Abstract: A control method of sound absorption characteristics of a soundproof material is provided to change the sound absorption characteristics of the soundproof material while equally maintaining constituent materials, total thickness, and total weight of the soundproof material. The soundproof material includes: a surface cover layer composed of a fiber material; a back-surface layer laminated onto the surface cover layer, and composed of a porous material with voids interconnected with each other; and one or more joining layers laminated between the surface cover layer and the back-surface layer, each joining layer being composed of a joining material, having a total joint area percentage of less than 100% with respect to the entire contact surface between the surface cover layer and the back-surface layer. The sound absorption characteristics are changed by changing the areas of the joining layers.
    Type: Application
    Filed: December 2, 2019
    Publication date: March 10, 2022
    Inventors: Norikazu MATSUMOTO, Shoko SAKAI, Kenji OHTANI, Teruhisa MIYATA
  • Publication number: 20210272545
    Abstract: An object of the present invention is to provide a soundproof material having a practically useful high-level sound absorption coefficient that while maintaining thinness, and further having an expanded sound-absorbable frequency region. A means for solving the problem is a soundproof material comprising: a surface cover layer composed of a fiber material; a back-surface layer laminated onto the surface cover layer, and composed of a porous material with voids interconnected with each other; and a joining layer laminated between the surface cover layer and the back-surface layer, and composed of a joining material, wherein the fiber material has an average fiber diameter of 1 to 10 ?m and an air-permeation volume of 5 to 200 cm3/cm2·sec, and wherein the joining layer has a joint area percentage of 50 to 95% with respect to the entire surface where the surface cover layer and the back-surface layer face each other.
    Type: Application
    Filed: July 26, 2019
    Publication date: September 2, 2021
    Inventors: Norikazu MATSUMOTO, Shoko SAKAI, Kenji OHTANI, Teruhisa MIYATA
  • Patent number: 10160418
    Abstract: An impact absorbing member is provided below a fascia upper member (upper-face forming member) which forms an upper face of a front end portion of a vehicle. The impact absorbing member comprises a front side part which includes a front wall portion, a top wall portion, and a rear wall portion so as to have a U-shaped cross section opening downward and a flat-plate shaped rear side part which extends rearward from a lower end of the rear wall portion. A rear end portion of the rear side part is held at a radiator shroud as a vehicle-body-side member, and the rear side part is configured to slant obliquely forward and downward.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: December 25, 2018
    Assignee: MAZDA MOTOR CORPORATION
    Inventors: Hideaki Onishi, Ryo Komuta, Kenji Ohtani, Hiroyuki Yoshimoto, Hiroshi Sogabe, Masatoki Kito, Kazuya Matsumoto
  • Publication number: 20170349124
    Abstract: An impact absorbing member is provided below a fascia upper member (upper-face forming member) which forms an upper face of a front end portion of a vehicle. The impact absorbing member comprises a front side part which includes a front wall portion, a top wall portion, and a rear wall portion so as to have a U-shaped cross section opening downward and a flat-plate shaped rear side part which extends rearward from a lower end of the rear wall portion. A rear end portion of the rear side part is held at a radiator shroud as a vehicle-body-side member, and the rear side part is configured to slant obliquely forward and downward.
    Type: Application
    Filed: May 30, 2017
    Publication date: December 7, 2017
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Hideaki ONISHI, Ryo KOMUTA, Kenji OHTANI, Hiroyuki YOSHIMOTO, Hiroshi SOGABE, Masatoki KITO, Kazuya MATSUMOTO
  • Patent number: 9601160
    Abstract: In one embodiment, a computer-implemented method includes writing a data set to a first write section of a magnetic medium and rewriting at least some of the data set as rewritten CWI-4 sets to a rewrite section of the magnetic medium. The data set includes a plurality of sub data sets, each sub data set including a data array organized in rows and columns. Each row of the data array includes four interleaved C1 codewords (a CWI-4). A first portion of the data set is stored as CWI-4 sets to the first write section of the magnetic medium with first headers. Each rewritten CWI-4 set is stored to the rewrite section of the magnetic medium as a number of rewritten CWI-4s having corresponding rewrite headers. Also, a length of any one of the rewrite headers is greater than a length of any one of the first headers.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: March 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Steven R. Bentley, Roy D. Cideciyan, Simeon Furrer, Kenji Ohtani
  • Patent number: 9595301
    Abstract: In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. The program instructions are executable by a tape drive to cause the tape drive to perform a method. The method includes writing data to a first write section of a magnetic tape, at least some of the data being written in association with first headers. The method also includes selecting some of the data for rewrite based on detected errors. Moreover, the method includes rewriting the selected data to a rewrite section of the magnetic tape, the rewritten data being written in association with rewrite headers. A length of each of the rewrite headers is greater than a length of each of the first headers.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: March 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Steven R. Bentley, Roy D. Cideciyan, Simeon Furrer, Kenji Ohtani
  • Publication number: 20160293221
    Abstract: In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. The program instructions are executable by a tape drive to cause the tape drive to perform a method. The method includes writing data to a first write section of a magnetic tape, at least some of the data being written in association with first headers. The method also includes selecting some of the data for rewrite based on detected errors. Moreover, the method includes rewriting the selected data to a rewrite section of the magnetic tape, the rewritten data being written in association with rewrite headers. A length of each of the rewrite headers is greater than a length of each of the first headers.
    Type: Application
    Filed: March 23, 2016
    Publication date: October 6, 2016
    Inventors: Steven R. Bentley, Roy D. Cideciyan, Simeon Furrer, Kenji Ohtani
  • Publication number: 20160293220
    Abstract: In one embodiment, a computer-implemented method includes writing a data set to a first write section of a magnetic medium and rewriting at least some of the data set as rewritten CWI-4 sets to a rewrite section of the magnetic medium. The data set includes a plurality of sub data sets, each sub data set including a data array organized in rows and columns. Each row of the data array includes four interleaved C1 codewords (a CWI-4). A first portion of the data set is stored as CWI-4 sets to the first write section of the magnetic medium with first headers. Each rewritten CWI-4 set is stored to the rewrite section of the magnetic medium as a number of rewritten CWI-4s having corresponding rewrite headers. Also, a length of any one of the rewrite headers is greater than a length of any one of the first headers.
    Type: Application
    Filed: March 23, 2016
    Publication date: October 6, 2016
    Inventors: Steven R. Bentley, Roy D. Cideciyan, Simeon Furrer, Kenji Ohtani
  • Patent number: 9460763
    Abstract: The present invention includes a plurality of CPUs using memory as main memory, another function block using memory as a buffer, a CPU interface which controls access transfer from the plurality of CPUs to memory, and a DRAM controller for performing arbitration of the access transfer to the memory. Therein, the CPU interface causes access requests from the plurality of CPUs to wait, and receives and stores the address, data transfer mode and data size of each access, notifies the DRAM controller of the access requests, and then, upon receiving grant signals for the access requests, sends information to the DRAM controller according to the grant signals, whereupon the DRAM controller receives the grant signals, and on the basis of the access arbitration, specifies CPUs for which transfers have been granted so as to send the grant signals to the CPU interface.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: October 4, 2016
    Assignee: International Business Machines Corporation
    Inventors: Hisato Matsuo, Rika Nagahara, Kenji Ohtani
  • Publication number: 20160211006
    Abstract: The present invention includes a plurality of CPUs using memory as main memory, another function block using memory as a buffer, a CPU interface which controls access transfer from the plurality of CPUs to memory, and a DRAM controller for performing arbitration of the access transfer to the memory. Therein, the CPU interface causes access requests from the plurality of CPUs to wait, and receives and stores the address, data transfer mode and data size of each access, notifies the DRAM controller of the access requests, and then, upon receiving grant signals for the access requests, sends information to the DRAM controller according to the grant signals, whereupon the DRAM controller receives the grant signals, and on the basis of the access arbitration, specifies CPUs for which transfers have been granted so as to send the grant signals to the CPU interface.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 21, 2016
    Inventors: Hisato Matsuo, Rika Nagahara, Kenji Ohtani
  • Patent number: 9311960
    Abstract: In one embodiment, a system includes a controller and logic integrated with and/or executable by the controller, the logic being configured to write a data set to a first write section of a magnetic medium, the data set including a plurality of sub data sets, each including a data array organized in rows and columns, each row of the data array including a CWI-4. A first portion of the data set is stored as CWI-4 sets to the first write section of the magnetic medium with first headers. The logic is also configured to rewrite at least some of the data set as rewritten CWI-4 sets to a rewrite section of the magnetic medium as rewritten CWI-4s having corresponding rewrite headers. A length of any one of the rewrite headers is greater than a length of any one of the first headers.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: April 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Steven R. Bentley, Roy D. Cideciyan, Simeon Furrer, Kenji Ohtani
  • Patent number: 9268721
    Abstract: The present invention includes a plurality of CPUs using memory as main memory, another function block using memory as a buffer, a CPU interface which controls access transfer from the plurality of CPUs to memory, and a DRAM controller for performing arbitration of the access transfer to the memory. Therein, the CPU interface causes access requests from the plurality of CPUs to wait, and receives and stores the address, data transfer mode and data size of each access, notifies the DRAM controller of the access requests, and then, upon receiving grant signals for the access requests, sends information to the DRAM controller according to the grant signals, whereupon the DRAM controller receives the grant signals, and on the basis of the access arbitration, specifies CPUs for which transfers have been granted so as to send the grant signals to the CPU interface.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: February 23, 2016
    Assignee: International Business Machines Corporation
    Inventors: Hisato Matsuo, Rika Nagahara, Kenji Ohtani
  • Patent number: 8762805
    Abstract: A method for decoding encoded data comprising integrated data and header protection is disclosed herein. In one embodiment, such a method includes receiving an extended data array. The extended data array includes a data array organized into rows and columns, headers appended to the rows of the data array, column ECC parity protecting the columns of the data array, and row ECC parity protecting the rows and headers combined. The method then decodes the extended data array. Among other operations, this decoding step includes checking the header associated with each row to determine whether the header is legal. If the header is legal, the method determines the contribution of the header to the corresponding row ECC parity. The method then reverses the contribution of the header to the corresponding row ECC parity. A corresponding apparatus (i.e., a tape drive configured to implement the above-described method) is also disclosed herein.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: June 24, 2014
    Assignee: International Business Machines Corporation
    Inventors: Roy Daron Cideciyan, Hisato Matsuo, Thomas Mittelholzer, Kenji Ohtani, Paul J Seger, Keisuke Tanaka
  • Publication number: 20140059286
    Abstract: Provided is a memory access device for a shared memory mechanism of main memory for a plurality of CPUs. The present invention includes a plurality of CPUs using memory as main memory, another function block using memory as a buffer, a CPU interface which controls access transfer from the plurality of CPUs to memory, and a DRAM controller for performing arbitration of the access transfer to the memory. Therein, the CPU interface causes access requests from the plurality of CPUs to wait, and receives and stores the address, data transfer mode and data size of each access, notifies the DRAM controller of the access requests, and then, upon receiving grant signals for the access requests, sends information to the DRAM controller according to the grant signals, whereupon the DRAM controller receives the grant signals, and on the basis of the access arbitration, specifies CPUs for which transfers have been granted so as to send the grant signals to the CPU interface.
    Type: Application
    Filed: October 6, 2011
    Publication date: February 27, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hisato Matsuo, Rika Nagahara, Kenji Ohtani
  • Patent number: 8645800
    Abstract: A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Roy Daron Cideciyan, Hisato Matsuo, Thomas Mittelholzer, Kenji Ohtani, Paul J Seger, Keisuke Tanaka
  • Patent number: 8495470
    Abstract: A method for efficiently rewriting data to tape is disclosed herein. In one embodiment, such a method includes writing a data set to tape, the data set comprising S sub data sets of fixed size, each sub data set comprising N code word interleaves (CWIs). The method further includes reading the data set while writing it to the tape to identify faulty CWIs. While reading the data set, the method buffers the faulty CWIs (such as by storing, identifying, and/or marking the faulty CWIs) for later retrieval. When the end of the data set is reached, the method writes corrected versions of the faulty CWIs to the end of the data set. A corresponding apparatus is also disclosed and claimed herein.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Roy Daron Cideciyan, Thomas Mittelholzer, Kenji Ohtani, Paul J Seger, Keisuke Tanaka
  • Patent number: 8479079
    Abstract: A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Roy Daron Cideciyan, Hisato Matsuo, Thomas Mittelholzer, Kenji Ohtani, Paul J Seger, Keisuke Tanaka
  • Publication number: 20120210194
    Abstract: A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein.
    Type: Application
    Filed: April 19, 2012
    Publication date: August 16, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Roy D. Cideciyan, Hisato Matsuo, Thomas Mittelholzer, Kenji Ohtani, Paul J. Seger, Keisuke Tanaka