Abstract: A data writing method for a magnetoresistive effect element of an aspect of the present invention including generating a write current in which a falling period from the start of a falling edge to the end of the falling edge is longer than a rising period from the start of a rising edge to the end of the rising edge, and flowing the write current through the magnetoresistive effect element which comprises a first magnetic layer having an invariable magnetizing direction, a second magnetic layer having a variable magnetizing direction, and a tunnel barrier layer provided between the first magnetic layer and the second magnetic layer, to change the magnetizing direction of the second magnetic layer.

Abstract: A resistive memory includes a plurality of memory cells, a plurality of reference cells having mutually different resistance values, at least one sense amplifier having a first input terminal connected to one selected memory cell which is selected from the plurality of memory cells at a time of read, and a second input terminal connected to one selected reference cell which is selected from the plurality of reference cells at the time of read, and one latch circuit which holds offset information of the at least one sense amplifier. The resistive memory further includes a decoder which selects, in accordance with the offset information, the one selected reference cell from the plurality of reference cells, and connects the one selected reference cell to the second input terminal of the at least one sense amplifier.

Abstract: A magnetic random access memory of an aspect of the present invention including a magnetoresistive effect element having a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is reversible, and a non-magnetic layer provided between the fixed and recording layers, wherein the magnetization directions of the fixed and recording layers are in a parallel state or in an anti-parallel state depending on a direction of a current flowing between the fixed and recording layers, a first transistor having a gate and a first current path having one end connected to the fixed layer, a second transistor having a gate and a second current path having one end connected to the recording layer, a first bit line to which other end of the first current path is connected, and a second bit line to which other end of the second current path is connected.

Abstract: A resistance-change memory includes first and second bit lines running in the same direction, a third bit line running parallel to the first and second bit lines, fourth and fifth bit lines running in the same direction, a sixth bit line running parallel to the fourth and fifth bit lines, a first memory element which has one and the other terminals connected to the first and third bit lines, and changes to one of first and second resistance states, a first reference element having one and the other terminals connected to the fourth and sixth bit lines, and set in the first resistance state, a second reference element having one and the other terminals connected to the fifth and sixth bit lines, and set in the second resistance state, and a sense amplifier having first and second input terminals connected to the first and fourth bit lines.

Abstract: According to one embodiment, a magnetic memory includes a magnetoresistive effect element including a first magnetic layer invariable in magnetization direction, a second magnetic layer variable in magnetization direction, and an intermediate layer between the first magnetic layer and the second magnetic layer, an error detecting and correcting circuit which detects whether first data in the magnetoresistive effect element includes any error and which outputs error-corrected second data when the first data includes an error, a writing circuit which generates one of the first write current including a first pulse width and the second write current including a second pulse width greater than the first pulse width, and a control circuit which controls the writing circuit to pass the second write current through the magnetoresistive effect element when the second data is written into the magnetoresistive effect element.

Abstract: According to one embodiment, a magnetic memory includes a magnetoresistive element includes a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is variable and a nonmagnetic layer disposed between the fixed layer and the recording layer. A direction of a read current is set to a first direction in a case where an expression of MR ratio ?|Ic+/Ic?|?1 is satisfied if a critical current of the first direction used to write the magnetoresistive element to the parallel state is set to Ic? and a critical current of a second direction used to write the magnetoresistive element to the anti-parallel state is set to Ic+.

Abstract: A resistance change memory includes first and second memory cell arrays which are adjacent to each other in a first direction, first and second reference cell arrays paired with the first and second memory cell arrays, a first sense amplifier shared by the first and second memory cell arrays and arranged between the first and second memory cell arrays, a first data bus which transfers data of a first readout cell in the first memory cell array to the first sense amplifier, and a second data bus which transfers data of a first reference cell in the first reference cell array to the first sense amplifier. The first and second data buses run on both sides of the first sense amplifier in a second direction and cross each other while sandwiching the first sense amplifier.

Abstract: According to one embodiment, a semiconductor memory device includes a variable resistance element configured to store data “0” and data “1” in accordance with a change in resistance value, a current generator configured to generate a reference current for determining data of the variable resistance element, and having an admittance middle between an admittance of a variable resistance element storing data “0” and an admittance of a variable resistance element storing data “1”, and a sense amplifier includes a first input terminal connected to the variable resistance element and a second input terminal connected to the current generator, and configured to compare currents of the first input terminal and the second input terminal.

Abstract: A resistance change memory device includes memory cells including two transistors connected in parallel between a first node and a connecting node and a variable resistance element whose one end is connected to the connecting node. The first node of each memory cell and a second node, which is the other end of the variable resistance element of the memory cell, are connected to different bit lines. The first node of a one memory cell and the first node of another memory cell which is adjacent on a first side along the second axis to the one memory are connected to the same bit line. The second node of the one memory cell and the second node of still another memory cell which is adjacent on a second side along the second axis to the one memory cell are connected to the same bit line.

Abstract: A magnetic random access memory includes a memory cell having a first magnetoresistive effect element, a reference cell having a second magnetoresistive effect element set in a low-resistance state, a first bit line connected to the memory cell, and set at a first bias potential in a read operation, a second bit line connected to the reference cell, and set at a second bias potential in the read operation, and a reference voltage generator including a reference current generator having a third magnetoresistive effect element set in the high-resistance state, and a current-voltage converter having a fourth magnetoresistive effect element set in the low-resistance state, the reference current generator generating a first electric current by applying the first bias potential to the third magnetoresistive effect element, and the current-voltage converter generating the second bias potential by supplying a second electric current to the fourth magnetoresistive effect element.

Abstract: A resistive memory includes a plurality of memory cells, a plurality of reference cells having mutually different resistance values, at least one sense amplifier having a first input terminal connected to one selected memory cell which is selected from the plurality of memory cells at a time of read, and a second input terminal connected to one selected reference cell which is selected from the plurality of reference cells at the time of read, and one latch circuit which holds offset information of the at least one sense amplifier. The resistive memory further includes a decoder which selects, in accordance with the offset information, the one selected reference cell from the plurality of reference cells, and connects the one selected reference cell to the second input terminal of the at least one sense amplifier.

Abstract: A resistance change memory of an aspect of the present invention including memory cells including resistance change memory element, word lines connected to the memory cells, a row decoder which activates the word lines, redundant cells used instead of defective cells, a redundant word line connected to redundant cells, a redundant row decoder which activates the redundant word line, a control circuit in which defect address information indicating the word line connected to the defective cell is stored and which remedies the defective cell, and regions provided in a memory cell array and a redundant cell array and identified based on column address information, wherein the control circuit replaces a part of the word line connected to the defective cell with a part of the redundant word line in accordance with each of the regions, and allows the redundant row decoder to activate the replaced redundant word line.

Abstract: A data writing method for a magnetoresistive effect element of an aspect of the present invention including generating a write current in which a falling period from the start of a falling edge to the end of the falling edge is longer than a rising period from the start of a rising edge to the end of the rising edge, and flowing the write current through the magnetoresistive effect element which comprises a first magnetic layer having an invariable magnetizing direction, a second magnetic layer having a variable magnetizing direction, and a tunnel barrier layer provided between the first magnetic layer and the second magnetic layer, to change the magnetizing direction of the second magnetic layer.

Abstract: A magnetic random access memory of an aspect of the present invention including a magnetoresistive effect element having a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is reversible, and a non-magnetic layer provided between the fixed and recording layers, wherein the magnetization directions of the fixed and recording layers are in a parallel state or in an anti-parallel state depending on a direction of a current flowing between the fixed and recording layers, a first transistor having a gate and a first current path having one end connected to the fixed layer, a second transistor having a gate and a second current path having one end connected to the recording layer, a first bit line to which other end of the first current path is connected, and a second bit line to which other end of the second current path is connected.

Abstract: A resistance change memory includes two memory cell arrays each including a plurality of memory cells, the memory cells including variable resistive elements, two reference cell arrays provided to correspond to the two memory cell arrays, respectively, and each including a plurality of reference cells, the reference cells having a reference value, and a sense amplifier shared by the two memory cell arrays and detecting data in an accessed memory cell by use of a reference cell array corresponding to a second memory cell array different from a first memory cell array including the accessed memory cell. In reading the data, a particular reference cell in one reference cell array is always activated for an address space based on one memory cell array as a unit.

Abstract: A resistance change memory includes first and second memory cell arrays which are adjacent to each other in a first direction, first and second reference cell arrays paired with the first and second memory cell arrays, a first sense amplifier shared by the first and second memory cell arrays and arranged between the first and second memory cell arrays, a first data bus which transfers data of a first readout cell in the first memory cell array to the first sense amplifier, and a second data bus which transfers data of a first reference cell in the first reference cell array to the first sense amplifier. The first and second data buses run on both sides of the first sense amplifier in a second direction and cross each other while sandwiching the first sense amplifier.

Abstract: A resistance-change memory includes first and second bit lines running in the same direction, a third bit line running parallel to the first and second bit lines, fourth and fifth bit lines running in the same direction, a sixth bit line running parallel to the fourth and fifth bit lines, a first memory element which has one and the other terminals connected to the first and third bit lines, and changes to one of first and second resistance states, a first reference element having one and the other terminals connected to the fourth and sixth bit lines, and set in the first resistance state, a second reference element having one and the other terminals connected to the fifth and sixth bit lines, and set in the second resistance state, and a sense amplifier having first and second input terminals connected to the first and fourth bit lines.

Abstract: A spin injection write type magnetic memory device includes memory cells which have a magnetoresistance effect element and a select transistor. The magnetoresistance effect element has one end connected to a first node. The select transistor has a first diffusion area connected to another end of the magnetoresistance effect element and a second diffusion area connected to a second node. A select line extends along a first direction and is connected to a gate electrode of the select transistor. A first interconnect extends along a second direction and is connected to the first node. A second interconnect extends along the second direction and is connected to the second node. Two of the memory cells adjacent along the first direction share the first node. Two of the memory cells adjacent along the second direction share the second node.

Abstract: A semiconductor memory includes a memory cell as a resistance change element and a switching element which are connected in series and a read word line connected to a control terminal of the switching element. In addition, the semiconductor memory includes a circuit which executes an auto-close operation for causing which makes a read word line RWL to be subjected to non-activation automatically after a fixed period from start of a read operation.

Abstract: A magnetic random access memory includes a memory cell having a first magnetoresistive effect element, a reference cell having a second magnetoresistive effect element set in a low-resistance state, a first bit line connected to the memory cell, and set at a first bias potential in a read operation, a second bit line connected to the reference cell, and set at a second bias potential in the read operation, and a reference voltage generator including a reference current generator having a third magnetoresistive effect element set in the high-resistance state, and a current-voltage converter having a fourth magnetoresistive effect element set in the low-resistance state, the reference current generator generating a first electric current by applying the first bias potential to the third magnetoresistive effect element, and the current-voltage converter generating the second bias potential by supplying a second electric current to the fourth magnetoresistive effect element.