Abstract: A computer-implemented system and method for obtaining product related information. Information related to a product obtained from a plurality of different sources is transformed into processed product data with a plurality of levels. Callouts and contexts are identified in the processed product data. A product-to-chemical continuum is generated by creating callout-context pathway segments between the plurality of levels of the processed product data based on the callouts and contexts identified. A query request for product information is transformed into a set of context search parameters, which is used to traverse the product-to-chemical continuum through the callout-context pathway segments that span the plurality of levels. The product information that matches the set of context search parameters is extracted from the product-to-chemical continuum. The callout-context pathway segments reduce processing resources and time needed to obtain the product information.

Abstract: A technique is provided that reduces the number of used entries in a CAM required to store a rule. A data conversion device generates entry data which is to be compared with a search key and is stored in an associative memory that can hold three or more values. The data conversion device includes a conversion circuit for extracting a plurality of character strings from an inputted rule in accordance with a regular expression based on the regular expression and converting first and second character strings included in the character strings, respectively, into first and second bit data different from each other, and an encode circuit that compares the first bit data and the second bit data for each bit and generates entry data where each mismatch bit among a plurality of bits included in the first bit data is converted into “Don't Care” value based on a comparison result.

Abstract: The present invention makes it possible to form a circuit configuration that is capable of executing a keyword search at an increased speed while suppressing an increase in the memory capacity of a content-addressable memory. A semiconductor device according to an aspect of the present invention searches an input data string for a predesignated keyword, and includes a first content-addressable memory that stores a partial keyword corresponding to a predetermined number of data beginning with the first data of the keyword, a second content-addressable memory that stores the entirety of the keyword, and a control circuit that is coupled to the first content-addressable memory and to the second content-addressable memory. When a portion matching the partial keyword is detected in the input data string by a search in the first content-addressable memory, the second content-addressable memory executes a search on search data extracted from the input data string.

Abstract: A technique is provided that reduces the number of used entries in a CAM required to store a rule. A data conversion device generates entry data which is to be compared with a search key and is stored in an associative memory that can hold three or more values. The data conversion device includes a conversion circuit for extracting a plurality of character strings from an inputted rule in accordance with a regular expression based on the regular expression and converting first and second character strings included in the character strings, respectively, into first and second bit data different from each other, and an encode circuit that compares the first bit data and the second bit data for each bit and generates entry data where each mismatch bit among a plurality of bits included in the first bit data is converted into “Don't Care” value based on a comparison result.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: The present invention makes it possible to form a circuit configuration that is capable of executing a keyword search at an increased speed while suppressing an increase in the memory capacity of a content-addressable memory. A semiconductor device according to an aspect of the present invention searches an input data string for a predesignated keyword, and includes a first content-addressable memory that stores a partial keyword corresponding to a predetermined number of data beginning with the first data of the keyword, a second content-addressable memory that stores the entirety of the keyword, and a control circuit that is coupled to the first content-addressable memory and to the second content-addressable memory. When a portion matching the partial keyword is detected in the input data string by a search in the first content-addressable memory, the second content-addressable memory executes a search on search data extracted from the input data string.

Abstract: An electronic device includes a first supply target unit that accepts supply of power from an external power supply, a second supply target unit that accepts supply of power from a battery, a main body, and a controller, wherein the controller starts to accept supply of power from both the external power supply and the battery and starts to output, to the main body, a voltage of the power supplied from both the external power supply and the battery in a case where a predetermined time has elapsed since start of a predetermined operation of the main body while a voltage of power accepted from the external power supply has been output to the main body.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: A computer-implemented system and method for obtaining product related information. Information related to a product obtained from a plurality of different sources is transformed into processed product data with a plurality of levels. Callouts and contexts are identified in the processed product data. A product-to-chemical continuum is generated by creating callout-context pathway segments between the plurality of levels of the processed product data based on the callouts and contexts identified. A query request for product information is transformed into a set of context search parameters, which is used to traverse the product-to-chemical continuum through the callout-context pathway segments that span the plurality of levels. The product information that matches the set of context search parameters is extracted from the product-to-chemical continuum. The callout-context pathway segments reduce processing resources and time needed to obtain the product information.

Abstract: An electronic device includes a first supply target unit that accepts supply of power from an external power supply, a second supply target unit that accepts supply of power from a battery, a main body, and a controller, wherein the controller starts to accept supply of power from both the external power supply and the battery and starts to output, to the main body, a voltage of the power supplied from both the external power supply and the battery in a case where a predetermined time has elapsed since start of a predetermined operation of the main body while a voltage of power accepted from the external power supply has been output to the main body.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented.

Abstract: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented.

Abstract: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.