Patents by Inventor Kenju Nishikido

Kenju Nishikido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210043674
    Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.
    Type: Application
    Filed: October 21, 2020
    Publication date: February 11, 2021
    Applicant: SONY CORPORATION
    Inventors: Keishi INOUE, Kenju NISHIKIDO
  • Publication number: 20210006737
    Abstract: There is provided a solid-state imaging device including a semiconductor substrate on which photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array, and a stacked body formed by stacking layers on the semiconductor substrate, wherein the stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices, a planarization layer that is stacked on the in-layer lens layer and that has a generally planarized surface, and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices, and the in-layer lens layer has structures at a height generally equal to a height of the in-layer lenses, the structures being provided on an outside of the imaging device region.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 7, 2021
    Inventors: KENTA NOJIMA, KENJU NISHIKIDO
  • Patent number: 10854657
    Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: December 1, 2020
    Assignee: Sony Corporation
    Inventors: Keishi Inoue, Kenju Nishikido
  • Patent number: 10812747
    Abstract: A solid-state imaging device including a semiconductor substrate on which a plurality of photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array and a stacked body formed by stacking a plurality of layers on the semiconductor substrate. The stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices. The solid-state imaging device further includes a planarization layer that is stacked on the in-layer lens layer and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices. The in-layer lens layer has a plurality of structures at a height equal to a height of the in-layer lenses, the plurality of structures being provided on an outside of the imaging device region.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: October 20, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenta Nojima, Kenju Nishikido
  • Publication number: 20200168653
    Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.
    Type: Application
    Filed: January 5, 2017
    Publication date: May 28, 2020
    Applicant: SONY CORPORATION
    Inventors: Keishi INOUE, Kenju NISHIKIDO
  • Publication number: 20190215474
    Abstract: The deterioration of light condensing characteristics of an overall solid-state imaging device resulting from providing in-layer lenses is suppressed while preventing the deterioration of device characteristics of the solid-state imaging device and reduction of yield.
    Type: Application
    Filed: June 23, 2017
    Publication date: July 11, 2019
    Inventors: KENTA NOJIMA, KENJU NISHIKIDO
  • Patent number: 10088608
    Abstract: The present technology relates to a lens array and a manufacturing method therefor, a solid-state imaging apparatus, and an electronic apparatus that can improve the AF performance while suppressing the deterioration of image quality. A lens array includes microlenses that are formed corresponding to phase difference detection pixels that are provided to be mixed in imaging pixels. Each of the microlenses is formed such that a lens surface thereof is a substantially spherical surface, the microlens has a rectangular shape in a planar view and four corners are not substantially rounded, and a bottom surface in vicinity of an opposite-side boundary portion that includes an opposite-side center portion of a pixel boundary portion in a cross-sectional view is higher than a bottom surface in vicinity of a diagonal boundary portion that includes a diagonal boundary portion. The present technology is applicable to a lens array of a CMOS image sensor, for example.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: October 2, 2018
    Assignee: SONY CORPORATION
    Inventors: Yoichi Ootsuka, Kenju Nishikido, Ippei Yoshiba
  • Patent number: 9985065
    Abstract: A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: May 29, 2018
    Assignee: Sony Corporation
    Inventors: Hideki Hirano, Akiko Ogino, Kenju Nishikido, Iwao Sugiura, Haruhiko Ajisawa, Ikuo Yoshihara
  • Patent number: 9472589
    Abstract: An solid-state imaging device includes a pixel region formed on a semiconductor substrate, an effective pixel region and a shielded optical black region in the pixel region, a multilayer wiring layer formed on a surface of the side opposite to a light incident side of the semiconductor substrate, a supporting substrate bonded to a surface of the multilayer wiring layer side, and an antireflection structure that is formed on the bonding surface side of the supporting substrate.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: October 18, 2016
    Assignee: SONY CORPORATION
    Inventors: Kenju Nishikido, Kazunori Nagahata
  • Publication number: 20160231468
    Abstract: The present technology relates to a lens array and a manufacturing method therefor, a solid-state imaging apparatus, and an electronic apparatus that can improve the AF performance while suppressing the deterioration of image quality. A lens array includes microlenses that are formed corresponding to phase difference detection pixels that are provided to be mixed in imaging pixels. Each of the microlenses is formed such that a lens surface thereof is a substantially spherical surface, the microlens has a rectangular shape in a planar view and four corners are not substantially rounded, and a bottom surface in vicinity of an opposite-side boundary portion that includes an opposite-side center portion of a pixel boundary portion in a cross-sectional view is higher than a bottom surface in vicinity of a diagonal boundary portion that includes a diagonal boundary portion. The present technology is applicable to a lens array of a CMOS image sensor, for example.
    Type: Application
    Filed: September 12, 2014
    Publication date: August 11, 2016
    Inventors: Yoichi OOTSUKA, Kenju NISHIKIDO, Ippei YOSHIBA
  • Publication number: 20160104736
    Abstract: A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
    Type: Application
    Filed: September 11, 2015
    Publication date: April 14, 2016
    Inventors: Hideki Hirano, Akiko Ogino, Kenju Nishikido, Iwao Sugiura, Haruhiko Ajisawa, Ikuo Yoshihara
  • Patent number: 9171877
    Abstract: A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: October 27, 2015
    Assignee: Sony Corporation
    Inventors: Hideki Hirano, Akiko Ogino, Kenju Nishikido, Iwao Sugiura, Haruhiko Ajisawa, Ikuo Yoshihara
  • Publication number: 20140203390
    Abstract: An solid-state imaging device includes a pixel region formed on a semiconductor substrate, an effective pixel region and a shielded optical black region in the pixel region, a multilayer wiring layer formed on a surface of the side opposite to a light incident side of the semiconductor substrate, a supporting substrate bonded to a surface of the multilayer wiring layer side, and an antireflection structure that is formed on the bonding surface side of the supporting substrate.
    Type: Application
    Filed: March 24, 2014
    Publication date: July 24, 2014
    Applicant: SONY CORPORATION
    Inventors: Kenju Nishikido, Kazunori Nagahata
  • Patent number: 8711263
    Abstract: A solid-state imaging device includes a pixel region formed on a semiconductor substrate, an effective pixel region and a shielded optical black region in the pixel region, a multilayer wiring layer formed on a surface of the side opposite to a light incident side of the semiconductor substrate, a supporting substrate bonded to a surface of the multilayer wiring layer side, and an antireflection structure that is formed on the bonding surface side of the supporting substrate.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: April 29, 2014
    Assignee: Sony Corporation
    Inventors: Kenju Nishikido, Kazunori Nagahata
  • Publication number: 20120120294
    Abstract: An solid-state imaging device includes a pixel region formed on a semiconductor substrate, an effective pixel region and a shielded optical black region in the pixel region, a multilayer wiring layer formed on a surface of the side opposite to a light incident side of the semiconductor substrate, a supporting substrate bonded to a surface of the multilayer wiring layer side, and an antireflection structure that is formed on the bonding surface side of the supporting substrate.
    Type: Application
    Filed: October 19, 2011
    Publication date: May 17, 2012
    Applicant: Sony Corporation
    Inventors: Kenju Nishikido, Kazunori Nagahata
  • Publication number: 20100155582
    Abstract: A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
    Type: Application
    Filed: December 9, 2009
    Publication date: June 24, 2010
    Applicant: SONY CORPORATION
    Inventors: Hideki HIRANO, Akiko OGINO, Kenju NISHIKIDO, Iwao SUGIURA, Haruhiko AJISAWA, Ikuo YOSHIHARA
  • Patent number: 6383941
    Abstract: The present disclosure relates to semiconductor processing, and to the plasma etching of organic layers, and in particular antireflective coating layers. We have discovered a particular combination of gases useful in producing chemically reactive plasma species, which provides unexpected control over etched feature critical dimension, etch profile, and uniformity of etch across a substrate surface, despite a difference in the spacing of etched features over the substrate surface. The combination of gases which produces chemically reactive plasma species consists essentially of CxHyFz, a bromine-comprising compound (which is typically HBr), and O2, where x ranges from 1 to 4, y ranges from 0 to 3, and z ranges from 1 to 10. Oxygen atoms may be substituted for hydrogen atoms in the CxHyFz compound to a limited extent Essentially inert gases which do not produce chemically reactive species may be added to the combination of etchant-species producing gases.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: May 7, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Meihua Shen, Kenju Nishikido, Jeffrey D. Chinn, Dragan Podlesnik