Patents by Inventor Kenju Nishikido
Kenju Nishikido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250031477Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.Type: ApplicationFiled: October 2, 2024Publication date: January 23, 2025Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Tomomi ITO, Kazuyoshi YAMASHITA, Atsushi MASAGAKI, Shinobu ASAYAMA, Shinya ITOH, Haruyuki NAKAGAWA, Kyohei MIZUTA, Susumu OOKI, Osamu OKA, Kazuto KAMIMURA, Takuji MATSUMOTO, Kenju NISHIKIDO
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Patent number: 12142626Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.Type: GrantFiled: February 28, 2020Date of Patent: November 12, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Tomomi Ito, Kazuyoshi Yamashita, Atsushi Masagaki, Shinobu Asayama, Shinya Itoh, Haruyuki Nakagawa, Kyohei Mizuta, Susumu Ooki, Osamu Oka, Kazuto Kamimura, Takuji Matsumoto, Kenju Nishikido
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Patent number: 12051713Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.Type: GrantFiled: May 31, 2022Date of Patent: July 30, 2024Assignee: SONY GROUP CORPORATIONInventors: Keishi Inoue, Kenju Nishikido
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Patent number: 11877078Abstract: The deterioration of light condensing characteristics of an overall solid-state imaging device resulting from providing in-layer lenses is suppressed while preventing the deterioration of device characteristics of the solid-state imaging device and reduction of yield.Type: GrantFiled: January 11, 2023Date of Patent: January 16, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kenta Nojima, Kenju Nishikido
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Patent number: 11575848Abstract: There is provided a solid-state imaging device including a semiconductor substrate on which photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array, and a stacked body formed by stacking layers on the semiconductor substrate, wherein the stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices, a planarization layer that is stacked on the in-layer lens layer and that has a generally planarized surface, and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices, and the in-layer lens layer has structures at a height generally equal to a height of the in-layer lenses, the structures being provided on an outside of the imaging device region.Type: GrantFiled: September 22, 2020Date of Patent: February 7, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kenta Nojima, Kenju Nishikido
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Publication number: 20220293662Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.Type: ApplicationFiled: May 31, 2022Publication date: September 15, 2022Applicant: SONY GROUP CORPORATIONInventors: Keishi INOUE, Kenju NISHIKIDO
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Patent number: 11398518Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.Type: GrantFiled: October 21, 2020Date of Patent: July 26, 2022Assignee: SONY CORPORATIONInventors: Keishi Inoue, Kenju Nishikido
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Patent number: 11362122Abstract: Variations in photoelectric conversion performance between pixels (valid pixels and light-shielding pixels) in an imaging element are reduced.Type: GrantFiled: May 16, 2018Date of Patent: June 14, 2022Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kenju Nishikido, Suguru Moriyama
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Publication number: 20220139992Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.Type: ApplicationFiled: February 28, 2020Publication date: May 5, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Tomomi ITO, Kazuyoshi YAMASHITA, Atsushi MASAGAKI, Shinobu ASAYAMA, Shinya ITOH, Haruyuki NAKAGAWA, Kyohei MIZUTA, Susumu OOKI, Osamu OKA, Kazuto KAMIMURA, Takuji MATSUMOTO, Kenju NISHIKIDO
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Publication number: 20220068991Abstract: A light-shielding body that shields incident light from an adjacent pixel is easily formed even in a case where the pixel is made finer. An imaging element is provided with a photoelectric conversion unit, an insulating film, an incident light transmitting film, and a light-shielding body. The photoelectric conversion unit is formed in a semiconductor substrate to perform photoelectric conversion of incident light from a subject and is arranged in a plurality of pixels. The insulating film is arranged on a plurality of pixels to insulate the semiconductor substrate. The incident light transmitting film is arranged adjacent to the insulating film of the plurality of pixels and transmits the incident light. The light-shielding body is arranged in a groove formed in the incident light transmitting film on a peripheral edge of each of the plurality of pixels to shield the incident light.Type: ApplicationFiled: November 22, 2019Publication date: March 3, 2022Inventors: Yoshikazu TANAKA, Nobuyuki OHBA, Sintaro NAKAJIKI, Yukihiro SAYAMA, Yuka OHKUBO, Tsubasa NISHIYAMA, Kenju NISHIKIDO, Yousuke HAGIHARA
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Publication number: 20210384248Abstract: To reduce reflection of incident light at a peripheral edge portion of an image sensor and prevent deterioration of the image quality. The image sensor includes an imaging area arranged on a semiconductor substrate, a wiring area, a protective film, and a protrusion arranged at the bottom of an opening formed in the semiconductor substrate. In the imaging area, a photoelectric conversion unit formed on a semiconductor substrate and performing photoelectric conversion of incident light is arranged. The wiring area has a wiring of transmitting a signal of the photoelectric conversion unit and is arranged adjacent to the front surface of the semiconductor substrate. The protective film is arranged on the back surface that is a surface different from the front surface of the semiconductor substrate, to transmit the incident light and protect the back surface of the semiconductor.Type: ApplicationFiled: October 15, 2019Publication date: December 9, 2021Inventor: KENJU NISHIKIDO
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Publication number: 20210343770Abstract: Variations in photoelectric conversion performance between pixels (valid pixels and light-shielding pixels) in an imaging element are reduced.Type: ApplicationFiled: May 16, 2018Publication date: November 4, 2021Inventors: KENJU NISHIKIDO, SUGURU MORIYAMA
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Patent number: 11139329Abstract: The present disclosure relates to a solid-state imaging element, a manufacturing method, and an electronic apparatus, in which irregular reflection of light inside a solid-state imaging element package can be suppressed. In the solid-state imaging element, a plurality of pixels is planarly arranged, a connection portion utilized for connection to the outside is provided on a more outer side than an imaging region, and an open portion that is opened up to the connection portion from a light incident surface side of the imaging region where light is incident is formed. Additionally, a plurality of protruding portions periodically arranged is formed on a counterbore surface that is a surface inside the open portion excluding the connection portion. The present technology can be applied to, for example, a back-illuminated type or layered CMOS image sensor.Type: GrantFiled: June 30, 2017Date of Patent: October 5, 2021Assignee: SONY CORPORATIONInventors: Kenju Nishikido, Takekazu Shinohara, Shinichiro Noudo, Misato Kondo
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Publication number: 20210183934Abstract: The present disclosure relates to a solid-state imaging element, a manufacturing method, and an electronic apparatus, in which irregular reflection of light inside a solid-state imaging element package can be suppressed. In the solid-state imaging element, a plurality of pixels is planarly arranged, a connection portion utilized for connection to the outside is provided on a more outer side than an imaging region, and an open portion that is opened up to the connection portion from a light incident surface side of the imaging region where light is incident is formed. Additionally, a plurality of protruding portions periodically arranged is formed on a counterbore surface that is a surface inside the open portion excluding the connection portion. The present technology can be applied to, for example, a back-illuminated type or layered CMOS image sensor.Type: ApplicationFiled: June 30, 2017Publication date: June 17, 2021Applicant: SONY CORPORATIONInventors: Kenju NISHIKIDO, Takekazu SHINOHARA, Shinichiro NOUDO, Misato KONDO
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Publication number: 20210043674Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.Type: ApplicationFiled: October 21, 2020Publication date: February 11, 2021Applicant: SONY CORPORATIONInventors: Keishi INOUE, Kenju NISHIKIDO
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Publication number: 20210006737Abstract: There is provided a solid-state imaging device including a semiconductor substrate on which photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array, and a stacked body formed by stacking layers on the semiconductor substrate, wherein the stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices, a planarization layer that is stacked on the in-layer lens layer and that has a generally planarized surface, and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices, and the in-layer lens layer has structures at a height generally equal to a height of the in-layer lenses, the structures being provided on an outside of the imaging device region.Type: ApplicationFiled: September 22, 2020Publication date: January 7, 2021Inventors: KENTA NOJIMA, KENJU NISHIKIDO
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Patent number: 10854657Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.Type: GrantFiled: January 5, 2017Date of Patent: December 1, 2020Assignee: Sony CorporationInventors: Keishi Inoue, Kenju Nishikido
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Patent number: 10812747Abstract: A solid-state imaging device including a semiconductor substrate on which a plurality of photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array and a stacked body formed by stacking a plurality of layers on the semiconductor substrate. The stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices. The solid-state imaging device further includes a planarization layer that is stacked on the in-layer lens layer and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices. The in-layer lens layer has a plurality of structures at a height equal to a height of the in-layer lenses, the plurality of structures being provided on an outside of the imaging device region.Type: GrantFiled: June 23, 2017Date of Patent: October 20, 2020Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kenta Nojima, Kenju Nishikido
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Publication number: 20200168653Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.Type: ApplicationFiled: January 5, 2017Publication date: May 28, 2020Applicant: SONY CORPORATIONInventors: Keishi INOUE, Kenju NISHIKIDO
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Publication number: 20190215474Abstract: The deterioration of light condensing characteristics of an overall solid-state imaging device resulting from providing in-layer lenses is suppressed while preventing the deterioration of device characteristics of the solid-state imaging device and reduction of yield.Type: ApplicationFiled: June 23, 2017Publication date: July 11, 2019Inventors: KENTA NOJIMA, KENJU NISHIKIDO