Abstract: A method and system for processing traffic in an access network includes receiving a plurality of ingress traffic streams from customer premise equipment (CPE). Each ingress traffic stream includes a plurality of Internet Protocol (IP) packets having an IP address. The ingress traffic streams are aggregated into a combined traffic stream without regard to the IP addresses. The combined traffic stream is transmitted to a backbone network for routing based on the IP addresses. An egress traffic stream is received from the backbone network and includes a plurality of IP packets each having an IP address. A CPE port is determined for each IP packet based on its IP address. The IP packets are routed to their respective CPE ports and transmitted to their destination CPEs.

Abstract: An asynchronous transfer mode (ATM) switch includes a switch memory having a plurality of discrete queues. A queue is dedicated to a connection in which a traffic stream is transmitted in cells and an inverse multiplex ATM (IMA) format. A switch controller is operable to receive a plurality of cells, to identify cells for the connection, to queue cells for the connection in the queue based on order information received with the cells, to reconstitute from the queue the traffic stream, and to switch the traffic stream and the ATM cells.

Abstract: A method and system for transmitting traffic having disparate rate components includes receiving a plurality of traffic streams. Each traffic stream includes a first component and a reduced rate second component associated with the first component. The first components of the traffic streams are segmented into successive cells. The second components of the traffic streams are distributed between a defined set of the cells for in-band transmission of the second components.

Abstract: An ATM switch is configured to route ATM traffic from two receive circuits to a destination. One copy of this traffic is discarded in one of the receive circuits so that only a single copy is passed to the ATM switch. Receive circuits contemplate both virtual path (VP) level and card or circuit level metrics for qualification of signals.

Abstract: A TDM switch is configured to route TDM traffic from two receive circuits to a destination. One copy of the traffic is discarded, and a memory selectively stores the other copy for routing to the TDM switch. Receive circuits contemplate both virtual tributary (VT) level and card or circuit level metrics for qualification of signals.

Abstract: A time slot interchanger (TSI) for a telecommunications node includes an exchange memory and a controller. The exchange memory includes a plurality of exchange memory slots. Each exchange memory slot is sized to store a traffic channel and includes a plurality of discretely addressable fields sized to store a sub-channel. The controller is operable in response to predefined switching instructions to write a sub-channel received in a first traffic channel to a first field in a memory slot and to write a sub-channel received in a second traffic channel to a second field in the memory slot.

Abstract: A synchronous bus for a telecommunications node includes a frame repeating at a defined interval. Each frame includes a plurality of service channels. In at least one frame, a service channel individually transports traffic for a DS-0 connection. A set of service channels in the frame together transport an asynchronous transfer mode (ATM) cell.

Abstract: An asynchronous transfer mode (ATM) switch includes a switch memory having a plurality of discrete queues. A queue is dedicated to a connection in which a traffic stream is transmitted in cells and an inverse multiplex ATM (IMA) format. A switch controller is operable to receive a plurality of cells, to identify cells for the connection, to queue cells for the connection in the queue based on order information received with the cells, to reconstitute from the queue the traffic stream, and to switch the traffic stream and the ATM cells.

Abstract: A synchronous switch for a telecommunications node includes a switch interface, a switch controller, and a switch memory. The switch interface is operable to terminate a bus and to receive from the bus a frame having a plurality of time slots. The time slots are each operable to transport a traffic cell. The switch controller is operable to determine a type for each traffic cell received at the switch interface and to determine based on the type for a traffic cell an address for storing the traffic cell in the switch memory. The switch memory is operable to receive the traffic cell from the switch interface and the address for storing the traffic cell from the switch controller and to store the traffic cell at the address.

Abstract: A rate adjustable backplane includes a set of switch slots configured to receive one or more switch cards forming a switch core and a plurality of line slots each configured to receive a line card. A low speed bus couples the line slots to the set of switch slots. A high speed bus also couples the line slots to the set of switch slots. Each line slot includes a low speed connector coupled to the low speed bus and a high speed connector coupled to the high speed bus. The low speed connector is adapted to receive a mating connector of a line card to establish a low speed communication connection between the line card and the switch core. The high speed connector is adapted to receive a mating connector of the line card to establish a high speed link between the line card and the switch core.

Abstract: A bus for a telecommunications node includes a frame repeating at a defined interval and including a defined number of slots. Each slot includes an overhead portion identifying a type of traffic in the slot and a service traffic portion transporting traffic of the type. A first slot in at least one frame transports in the service traffic portion asynchronous traffic and routing information for the asynchronous traffic in the telecommunications node. A second slot in the frame transports synchronous traffic in the service traffic portion and has a location in the frame associated with routing information for the synchronous traffic in the telecommunications node.

Abstract: A switch card for telecommunications node includes a shared memory operable to store traffic channels. A time slot interchanger (TSI) is coupled to a first bus and to the shared memory. The TSI is operable based on predefined switching instructions to access the shared memory to stored traffic channels received from the first bus and to retrieve traffic channels for transmission on the first bus. An asynchronous transfer mode (ATM) switch is operable to switch a traffic cell based on header information in the traffic cell. A traffic converter is operable to convert traffic channels retrieved from the shared memory to traffic cells for processing by a bus fuser and to convert traffic cells to traffic channels for storage in the shared memory. The bus fuser is coupled to the shared memory through the traffic converter, the ATM switch, and a second bus.

Abstract: A system and method for transporting telephony signals across an ATM network using AAL1 while eliminating the jitter associated with the AAL1 cells. The present invention uses starve/inspect techniques to dynamically buffer the ATM frames such that jitter associated with the cells can be reduced while avoiding unneeded buffering that would cause excessive delay.

Abstract: A single ATM traffic stream is carried over a plurality of lower bandwidth media, such as T-1 or E-1 interfaces, using inverse multiplexing assisted by a prepended byte at the beginning of each ATM cell, the byte containing a key to permit recovery of the proper order of ATM cells.

Abstract: A universal DS-0 channelized format is provided wherein selected states of CAS bits are used to indicate to the transport mechanism when DS-0 channels are not being used for voice and are available for use for data transport. In addition, the T1 frame format carries CAS bits only in the first DS-0 channel, so that robbed bits are disabled and not used to carry ABCD signaling bits, thereby avoiding any risk of data corruption. Still further, a special CAS signaling value not defined as a CAS state, is employed in a frame nibble instead of a frame counter to indicate that the state is in the first DS-0 slot.

Abstract: A cell grant mechanism is presented which allows a central device to control the transmission of cells from one or more remote devices connected to the central device over a physical medium. Grants are issued from a grant table in the central device to allow remote devices to transmit cells to the central device. The spacing of the grants are optimized to minimize cell delay variation. When there are unused cell opportunities, central device can issue grants to devices to utilize the unused cell opportunities on an available bit rate basis.

Abstract: In an Asynchronous Transfer Mode (ATM) communications network which operates over a shared media a method of addressing and access control between a central transceiver and multiple transceivers in a residence is required. A device identifier is placed in the in the Generic Flow Control (GFC) field of the ATM cells to indicate that cells are designated for a particular transceiver or transceivers in the residence. In the reverse direction, transceivers in the residence use the GFC field to indicate that they are attempting to sign onto the network. The GFC bits are returned to zero prior to passing the ATM cells to the ATM processing layer.

Abstract: An ATM layer device for interfacing between a physical layer device and an ATM switch, which includes means for prepending and postpending of switch routing information to cells destined to enter the switch and for removing such information from cells having left the switch

Abstract: Digital data is transported bidirectionally between a broadband network unit and devices. The data is transmitted in a series of frame intervals that include request slots and cell slots for transmission of ATM data. The request slots may be used by a device to request one or more cell slots. The broadband network unit determines which requests to grant. If the request is granted, the device may use the cell slot to transmit ATM data. In addition, the request slot can accommodate Time Division Multiplex data such as digital telephony.

Abstract: A method of searching a table stored in a memory for a record identifying a stored data word corresponding to a binary input data word, wherein the table is comprised of a plurality of records containing a select value field, a left search table address field, a right search table address field, and left and right search table address leaf fields, comprised of (a) indicating a particular single bit of the binary input data word based on a value stored in a select value field, (b) reading either the left or right search table address fields of the record containing the value stored in the first select value field, depending on the binary value of the particular single bit of the input data word indicated, (c) in the event a leaf field corresponding to the read left or right search table address stores a first binary value, repeating steps (a) and (b) using a record identified by the read left or right search table address, (d) in the event a left field corresponding to the read left or right search table addre