Patents by Inventor Kenneth R. Burch

Kenneth R. Burch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030153105
    Abstract: Wafer level testing is accomplished by using a visual indicator (43) in lieu of a probe machine. Before singulation, each die (52) in a wafer (50) is placed into a test mode and BIST circuitry (39) in each die performs predetermined tests of the other circuits on the die. A pass/fail signal is communicated to a visual indicating device, such as an LED, on the wafer. Each die has a corresponding visual indicator. The LED may be contained either on the die or in the scribe area. Multiple LEDs may be used for multiple circuit modules under test. The test permits easy detection of failures without using probing. Testing such as burn-in may be performed to determine whether a part will survive a range of operating conditions. In one form, a CMOS implementation of an LED may be used in conjunction with a CMOS wafer.
    Type: Application
    Filed: February 13, 2002
    Publication date: August 14, 2003
    Inventor: Kenneth R. Burch
  • Patent number: 5584031
    Abstract: A system and method is provided for executing a low power no operation instruction in a data processor (10) with a minimal amount of power consumption. In the instruction, an opcode has a mnemonic form of "SLEEP" and an operand which specifies a number of timing cycles the instruction should be executed. During execution of the SLEEP instruction, the operand is provided to a general register (26) in a CPU (12) of the data processor (10). An ALU (28) accesses the register (26) and decrements the operand until the contents are equal to zero. When the ALU (28) has decremented the operand to zero, a next software instruction is accessed and executed by the data processor.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: December 10, 1996
    Assignee: Motorola Inc.
    Inventors: Kenneth R. Burch, James R. Feddeler
  • Patent number: 5394028
    Abstract: A method and apparatus for transitioning between power supply levels. In one form, the present invention uses a circuit (22) in a data processing system (10) to smoothly and gradually transition a Power Output signal from a first power supply level to a second power supply level during operation. This transition from a first power supply level to a second power supply level must be smooth and gradual so that a circuit, such as oscillator circuit (12), which is receiving its power from Power Output, may continue to function properly during the transition. A Control signal, which can change back and forth between a first logic level and a second logic level, is used to select which power supply level will be provided as the Power Output.
    Type: Grant
    Filed: June 26, 1992
    Date of Patent: February 28, 1995
    Assignee: Motorola, Inc.
    Inventors: James R. Feddeler, Kenneth R. Burch
  • Patent number: 5383137
    Abstract: An emulation system (10) provides a plurality of circuits (20,28) which each emulate operation of a predetermined component of a target microprocessor (24). Each of the plurality of circuits (20,28) imitates a corresponding component of the target microprocessor (24). A power supply (12) provides power to both the target microprocessor and the plurality of circuits. A first voltage value is provided to a plurality of bus drivers (22, 26, 30). A second voltage value is provided to an internal circuit of each of target microprocessor (24) and the plurality of circuits (20, 28). A current measured between the power supply and each of the circuits accurately reflects a current drawn by the circuits. By designing the target microprocessor and the plurality of circuits such that the power supplied to each is separated from the power supplied to the bus drivers of each of the devices, the operating current of the internal circuitry is accurately measured in real time.
    Type: Grant
    Filed: December 3, 1992
    Date of Patent: January 17, 1995
    Assignee: Motorola, Inc.
    Inventor: Kenneth R. Burch
  • Patent number: 5272453
    Abstract: A method and apparatus for switching between gain curves of a switched gain voltage controlled oscillator (VCO) 52, 52' or 52". In one form, the present invention uses a switched gain voltage controlled oscillator (VCO) 52, 52' or 52" which utilizes a ring oscillator. A Gain Control signal is used to select between using a high gain curve and using a low gain curve. The low gain curve is produced by selecting a high resistance path to either power or ground. The high gain curve is produced by selecting a low resistance path to either power or ground.
    Type: Grant
    Filed: August 3, 1992
    Date of Patent: December 21, 1993
    Assignee: Motorola Inc.
    Inventors: Kevin M. Traynor, Hengwei Hsu, Kenneth R. Burch
  • Patent number: 5113156
    Abstract: A crystal oscillator uses automatic gain control to minimize the operating current through its inverting amplifier. The power supply potential to switching transistors of the amplifier is reduced by the automatic gain control to a level substantially equal to the sum of the switching thresholds thereof which minimizes simultaneous conduction through the switching transistors and associated operating current. The low level output signal of the amplifier becomes sinusoidal about a DC bias point operating at the resonant frequency of the crystal which eliminates undesirable harmonicas interfering with the crystal's natural vibration. The sinusoidal output signal may be buffered and level-shifted to a useable state.
    Type: Grant
    Filed: April 22, 1991
    Date of Patent: May 12, 1992
    Assignee: Motorola, Inc.
    Inventors: John K. Mahabadi, Kenneth R. Burch
  • Patent number: 5111487
    Abstract: Modulo timer apparatus including a chain of modulo counter stages is controllable by write signals generated by a central controller. The central controller is operative to generate a write signal corresponding to a selected counter stage, and a digital control signal. The initial counter stage of the chain includes a selecting circuit controlled by the digital control signal to couple either a reference clock signal or the corresponding write signal to the initial counter stage to alter the count thereof. Each successive counter stage includes a corresponding selecting circuit also controlled by the digital control signal to couple either a pulse signal generated from the preceding counter stage as it counts through its modulus value or the corresponding write signal to the successive counter stage to alter the count thereof.
    Type: Grant
    Filed: July 24, 1989
    Date of Patent: May 5, 1992
    Assignee: Motorola, Inc.
    Inventor: Kenneth R. Burch
  • Patent number: 4896122
    Abstract: A dual bandwidth crystal controlled oscillator is described having a first transconductance amplifier providing sufficient gain to maintain oscillation with an oscillator crystal at a minimum current drain. A second transconductance amplifier is provided which can be selectively coupled to the first transconductance amplifier, thereby augmenting the gain of the first transconductance amplifier to provide the capability for rapid oscillator start-up following battery saver operation. The dual bandwidth crystal controlled oscillator can be utilized in conventional oscillator and frequency synthesizer applications.
    Type: Grant
    Filed: July 14, 1989
    Date of Patent: January 23, 1990
    Assignee: Motorola, Inc.
    Inventors: Omid Tahernia, Barry W. Herold, Kenneth R. Burch
  • Patent number: 4879733
    Abstract: A timer which can be used to provide interrupt signals at predetermined but variable periods for multi-tasking microcomputers or serial data acquisition in pagers comprises a plurality of modulo counters. Each modulo counter has selectable clock inputs and has an output coupled via switches to a NOR gate and to the other modulo counters. Programmable configuring means control the switching means to configure the counters so as to produce desired outputs at the logic gate. The configuring means can also reset the modulus of the modulo counters to any desired value. Thus, the timer produces variable interrupt signals with little or no overhead processor time.
    Type: Grant
    Filed: January 28, 1988
    Date of Patent: November 7, 1989
    Assignee: Motorola, Inc.
    Inventors: Kenneth R. Burch, Mario A. Rivas
  • Patent number: 4839628
    Abstract: A paging receiver includes a nonvolatile memory which is readable for controlling the operation of the paging device and is capable of being partitioned into a plurality of regions. A protect means is also included for allowing modification to a selected region of the nonvolatile memory in response to an unlock signal. In a first embodiment, the unlock signal is externally applied to the paging receiver. In a second embodiment, the unlock signal is generated when a predetermined coded signal stored in the paging receiver matches a received coded signal. In a third embodiment, the protect means further includes a switch means to permit the selected region of memory to be modified while preventing other regions of memory to be modified.
    Type: Grant
    Filed: January 11, 1988
    Date of Patent: June 13, 1989
    Assignee: Motorola, Inc.
    Inventors: Walter L. Davis, Mario A. Rivas, Kenneth R. Burch, Vincent B. Deems
  • Patent number: 4771405
    Abstract: First and second unused bits of a multi-bit mapped register are utilized to control a desired function. Each of the bits are capable of assuming first and second stable states. The control function is enabled when the first bit is in the first state and the second bit is in a second state. The function is disabled when the first bit is in the second state and the second bit is in the first state. The function remains unaltered when the first and second bits are each in the same state.
    Type: Grant
    Filed: April 14, 1986
    Date of Patent: September 13, 1988
    Assignee: Motorola, Inc.
    Inventors: Kenneth R. Burch, Gordon R. Burns
  • Patent number: 4771249
    Abstract: A phase locked loop (PLL) is provided having a filter with a programmable wide and narrow bandwith. When PLL circuit operation is initiated or when the operational frequency of the PLL is changed by a substantial amount, a phase detector functions to force the filter in a wide bandwith mode to allow fast circuit operation in the transient mode. After the PLL output has settled close to a predetermined frequency, the number of times the output frequency varies above and below the predetermined frequency before reaching a locked state is detected and counted. After the output frequency has varied above and below the predetermined frequency a predetermined number of times, the filter is automatically switched to a low bandwith mode to allow the PLL to operate in a stable manner.
    Type: Grant
    Filed: May 26, 1987
    Date of Patent: September 13, 1988
    Assignee: Motorola, Inc.
    Inventors: Kenneth R. Burch, Wendell L. Little
  • Patent number: 4669059
    Abstract: A method for allowing the user of a data processor having a power-down instruction to selectively disable the power-down instruction. In the preferred circuit, the user stores a special code in a control register indicating that the power-down instruction is to be disabled. Upon a power-down instruction being subsequently executed, the processor is precluded by the code from turning off the oscillator which provides the system clocks. The method and circuit allows the code to be stored in the control register once and only once between system resets.
    Type: Grant
    Filed: November 7, 1983
    Date of Patent: May 26, 1987
    Assignee: Motorola, Inc.
    Inventors: Wendell L. Little, Kenneth R. Burch