Patents by Inventor Keun Do Ban

Keun Do Ban has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10504726
    Abstract: A nanoscale structure includes an array of pillars over an underlying layer, a separation wall layer including first separation walls formed over sidewalls of the pillars, and a block co-polymer (BCP) layer formed over the separation wall layer and filling gaps between the pillars. The BCP layer is phase-separated to include first domains that provide second separation walls formed over the first separation walls and second domains that are separated from each other by the first domains.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: December 10, 2019
    Assignee: SK HYNIX INC.
    Inventors: Keun Do Ban, Jung Gun Heo, Cheol Kyu Bok, Myoung Soo Kim
  • Patent number: 9911605
    Abstract: A method of forming fine patterns includes forming pillars arrayed in rows and columns on an underlying layer and forming a spacer layer on the underlying layer to cover the pillars. Portions of the spacer layer respectively covering the pillars arrayed in each row or in each column are in contact with each other to provide first interstitial spaces disposed between the pillars arrayed in a diagonal direction between a row direction and a column direction as well as to provide cleavages at corners of each of the first interstitial spaces in a plan view. A healing layer is formed on the spacer layer to fill the cleavages of the first interstitial spaces. The healing layer is formed to provide second interstitial spaces respectively located in the first interstitial spaces as well as to include a polymer material.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: March 6, 2018
    Assignee: SK Hynix Inc.
    Inventors: Jung Gun Heo, Hong Ik Kim, Keun Do Ban, Cheol Kyu Bok, Young Sik Kim
  • Patent number: 9840059
    Abstract: A fine pattern structure includes a lower hard mask layer on a pattern formation layer having a first region and a second region, first upper hard mask patterns disposed on the lower hard mask layer in the first region to expose portions of the lower hard mask layer, a second upper hard mask pattern covering the lower hard mask layer in the second region, guide patterns on the first and second upper hard mask patterns, neutralization patterns on the exposed portions of the lower hard mask layer in the first region, a first block co-polymer layer covering the guide patterns in the first region and the neutralization patterns, and a second block co-polymer layer covering the guide pattern in the second region.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: December 12, 2017
    Assignee: SK HYNIX INC.
    Inventors: Jung Hyung Lee, Cheol Kyu Bok, Keun Do Ban, Myoung Soo Kim, Ki Lyoung Lee
  • Publication number: 20170287702
    Abstract: A nanoscale structure includes an array of pillars over an underlying layer, a separation wall layer including first separation walls formed over sidewalls of the pillars, and a block co-polymer (BCP) layer formed over the separation wall layer and filling gaps between the pillars. The BCP layer is phase-separated to include first domains that provide second separation walls formed over the first separation walls and second domains that are separated from each other by the first domains.
    Type: Application
    Filed: June 16, 2017
    Publication date: October 5, 2017
    Inventors: Keun Do BAN, Jung Gun HEO, Cheol Kyu BOK, Myoung Soo KIM
  • Publication number: 20170271149
    Abstract: A method of forming fine patterns includes forming pillars arrayed in rows and columns on an underlying layer and forming a spacer layer on the underlying layer to cover the pillars. Portions of the spacer layer respectively covering the pillars arrayed in each row or in each column are in contact with each other to provide first interstitial s paces disposed between the pillars arrayed in a diagonal direction between a row direction and a column direction as well as to provide cleavages at corners of each of the first interstitial spaces in a plan view. A healing layer is formed on the spacer layer to fill the cleavages of the first interstitial spaces. The healing layer is formed to provide second interstitial spaces respectively located in the first interstitial spaces as well as to include a polymer material.
    Type: Application
    Filed: August 15, 2016
    Publication date: September 21, 2017
    Inventors: Jung Gun HEO, Hong Ik KIM, Keun Do BAN, Cheol Kyu BOK, Young Sik KIM
  • Patent number: 9691614
    Abstract: A method includes forming a template portion to provide a first opening trench portion surrounding a first isolated pattern, and forming an array of pillars on an underlying layer; forming a separation wall layer including first separation wall portions surrounding sidewalls of the pillars, and forming second separation wall portions covering sidewalls of the first opening trench portion; forming a block copolymer layer on the separation wall layer; forming first domains in gaps between the pillars, and forming second domains surrounding and separating the first domains by annealing the block copolymer layer; forming second openings by selectively removing the first domains; forming third openings between the second openings, and forming a fourth opening adjacent to the first isolated pattern by selectively removing the pillars and the template portion; and forming fifth openings, which extend from the second and third openings and penetrate the underlying layer, and forming a sixth opening, which extends fro
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: June 27, 2017
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Jong Cheon Park, Jung Gun Heo, Hong Ik Kim, Cheol Kyu Bok
  • Patent number: 9666448
    Abstract: A method of forming patterns includes forming an array of pillars on an underlying layer stacked on an etch target layer, forming a separation wall layer on the pillars to provide separation walls covering sidewalls of the pillars, forming a block copolymer layer on the separation wall layer, annealing the block copolymer layer to form first domains located between the pillars, and a second domain surrounding and isolating the first domains, selectively removing the first domains to form second openings, selectively removing the pillars to form fourth openings, forming fifth openings that extend from the second and fourth openings to penetrate the underlying layer, forming a sealing pattern that covers and seals dummy openings among the fifth openings, and forming seventh openings that extend from the fifth openings exposed by the sealing pattern to penetrate the etch target layer.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: May 30, 2017
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Hong Ik Kim, Jung Gun Heo, Cheol Kyu Bok
  • Patent number: 9640399
    Abstract: A method of forming patterns includes forming a guide pattern and first peripheral patterns on an underlying layer. The guide pattern provides first openings and the first peripheral patterns provide a fifth opening used in alignment of the guide pattern. An alignment status of the guide pattern is verified using the fifth opening. A block copolymer layer is formed to fill the first and fifth openings. The block copolymer layer is annealed to provide a blocking portion sealing the fifth opening and to form first domains in each first opening and a second domain surrounding the first domains formed in each first opening. The first domains are removed to form third openings. The underlying layer is etched using the blocking portion and sidewalls of the second domains as etch barriers to form fourth openings that extend from the third openings to penetrate the underlying layer.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: May 2, 2017
    Assignee: SK Hynix Inc.
    Inventors: Jung Gun Heo, Hong Ik Kim, Keun Do Ban, Cheol Kyu Bok
  • Patent number: 9523917
    Abstract: Methods of forming patterns includes guide patterns on a neutral layer. A self-assembling block copolymer (BCP) layer on the guide patterns and the neutral layer. By annealing the self-assembling BCP layer, first polymer block domains and second polymer block domains are formed The guide patterns are formed of a developable antireflective material. The neutral layer is formed of a cross-linked polymeric material.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: December 20, 2016
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Cheol Kyu Bok, Jung Gun Heo, Hong Ik Kim
  • Publication number: 20160358771
    Abstract: A method includes forming a template portion to provide a first opening trench portion surrounding a first isolated pattern, and forming an array of pillars on an underlying layer; forming a separation wall layer including first separation wall portions surrounding sidewalls of the pillars, and forming second separation wall portions covering sidewalls of the first opening trench portion; forming a block copolymer layer on the separation wall layer; forming first domains in gaps between the pillars, and forming second domains surrounding and separating the first domains by annealing the block copolymer layer; forming second openings by selectively removing the first domains; forming third openings between the second openings, and forming a fourth opening adjacent to the first isolated pattern by selectively removing the pillars and the template portion; and forming fifth openings, which extend from the second and third openings and penetrate the underlying layer, and forming a sixth opening, which extends fro
    Type: Application
    Filed: August 22, 2016
    Publication date: December 8, 2016
    Inventors: Keun Do BAN, Jong Cheon PARK, Jung Gun HEO, Hong Ik KIM, Cheol Kyu BOK
  • Patent number: 9478436
    Abstract: A method for forming patterns includes forming ellipse pillars on an underlying layer. The ellipse pillar has an elongated feature and includes nose sides and long sides connecting the nose sides, and the four ellipse pillars form a diamond array around a separation space. A guide lattice attached to sides of the ellipse pillars is formed to open first windows in the separation space. Second windows are formed in the guide lattice by selectively removing the ellipse pillars. A block copolymer layer is formed to fill the first and second windows. The block copolymer layer is phase-separated to form a first domain and a first matrix in the first window and to form a plurality of second domains and second matrix in the second window. The first and second domains are selectively removed to form first openings and second openings.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: October 25, 2016
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Young Sik Kim, Cheol Kyu Bok
  • Publication number: 20160293443
    Abstract: A method includes forming a template portion to provide a first opening trench portion surrounding a first isolated pattern, and forming an array of pillars on an underlying layer; forming a separation wall layer including first separation wall portions surrounding sidewalls of the pillars, and forming second separation wall portions covering sidewalls of the first opening trench portion; forming a block copolymer layer on the separation wall layer; forming first domains in gaps between the pillars, and forming second domains surrounding and separating the first domains by annealing the block copolymer layer; forming second openings by selectively removing the first domains; forming third openings between the second openings, and forming a fourth opening adjacent to the first isolated pattern by selectively removing the pillars and the template portion; and forming fifth openings, which extend from the second and third openings and penetrate the underlying layer, and forming a sixth opening, which extends fro
    Type: Application
    Filed: September 10, 2015
    Publication date: October 6, 2016
    Inventors: Keun Do BAN, Jong Cheon PARK, Jung Gun HEO, Hong Ik KIM, Cheol Kyu BOK
  • Publication number: 20160293442
    Abstract: A method of forming patterns includes forming an array of pillars on an underlying layer stacked on an etch target layer, forming a separation wall layer on the pillars to provide separation walls covering sidewalls of the pillars, forming a block copolymer layer on the separation wall layer, annealing the block copolymer layer to form first domains located between the pillars, and a second domain surrounding and isolating the first domains, selectively removing the first domains to form second openings, selectively removing the pillars to form fourth openings, forming fifth openings that extend from the second and fourth openings to penetrate the underlying layer, forming a sealing pattern that covers and seals dummy openings among the fifth openings, and forming seventh openings that extend from the fifth openings exposed by the sealing pattern to penetrate the etch target layer.
    Type: Application
    Filed: August 27, 2015
    Publication date: October 6, 2016
    Inventors: Keun Do BAN, Hong Ik KIM, Jung Gun HEO, Cheol Kyu BOK
  • Patent number: 9449840
    Abstract: A method includes forming a template portion to provide a first opening trench portion surrounding a first isolated pattern, and forming an array of pillars on an underlying layer; forming a separation wall layer including first separation wall portions surrounding sidewalls of the pillars, and forming second separation wall portions covering sidewalls of the first opening trench portion; forming a block copolymer layer on the separation wall layer; forming first domains in gaps between the pillars, and forming second domains surrounding and separating the first domains by annealing the block copolymer layer; forming second openings by selectively removing the first domains; forming third openings between the second openings, and forming a fourth opening adjacent to the first isolated pattern by selectively removing the pillars and the template portion; and forming fifth openings, which extend from the second and third openings and penetrate the underlying layer, and forming a sixth opening, which extends fro
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: September 20, 2016
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Jong Cheon Park, Jung Gun Heo, Hong Ik Kim, Cheol Kyu Bok
  • Publication number: 20160254154
    Abstract: A method of forming patterns includes forming a guide pattern and first peripheral patterns on an underlying layer. The guide pattern provides first openings and the first peripheral patterns provide a fifth opening used in alignment of the guide pattern. An alignment status of the guide pattern is verified using the fifth opening. A block copolymer layer is formed to fill the first and fifth openings. The block copolymer layer is annealed to provide a blocking portion sealing the fifth opening and to form first domains in each first opening and a second domain surrounding the first domains formed in each first opening. The first domains are removed to form third openings. The underlying layer is etched using the blocking portion and sidewalls of the second domains as etch barriers to form fourth openings that extend from the third openings to penetrate the underlying layer.
    Type: Application
    Filed: August 11, 2015
    Publication date: September 1, 2016
    Inventors: Jung Gun HEO, Hong Ik KIM, Keun Do BAN, Cheol Kyu BOK
  • Publication number: 20160238938
    Abstract: Methods of forming patterns includes guide patterns on a neutral layer. A self-assembling block copolymer (BCP) layer on the guide patterns and the neutral layer. By annealing the self-assembling BCP layer, first polymer block domains and second polymer block domains are formed The guide patterns are formed of a developable antireflective material. The neutral layer is formed of a cross-linked polymeric material.
    Type: Application
    Filed: April 25, 2016
    Publication date: August 18, 2016
    Inventors: Keun Do BAN, Cheol Kyu BOK, Jung Gun HEO, Hong Ik KIM
  • Patent number: 9354519
    Abstract: A method of forming patterns includes: forming guide patterns on an underlying layer, forming a self-assembling block copolymer (BCP) layer on the guide patterns and the underlying layer, annealing the self-assembling BCP layer to form first polymer block domains and second polymer block domains which are alternately and repeatedly arrayed, and selectively removing the first polymer block domains. The guide patterns are formed of a developable antireflective material. In addition, the guide patterns are spaced apart from each other such that a width of each of the guide patterns is less than a distance between the guide patterns.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: May 31, 2016
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Cheol Kyu Bok, Jung Gun Heo, Hong Ik Kim
  • Publication number: 20160077435
    Abstract: A method of forming patterns includes: forming guide patterns on an underlying layer, forming a self-assembling block copolymer (BCP) layer on the guide patterns and the underlying layer, annealing the self-assembling BCP layer to form first polymer block domains and second polymer block domains which are alternately and repeatedly arrayed, and selectively removing the first polymer block domains. The guide patterns are formed of a developable antireflective material. In addition, the guide patterns are spaced apart from each other such that a width of each of the guide patterns is less than a distance between the guide patterns.
    Type: Application
    Filed: February 12, 2015
    Publication date: March 17, 2016
    Inventors: Keun Do BAN, Cheol Kyu BOK, Jung Gun HEO, Hong Ik KIM
  • Patent number: 9257281
    Abstract: A method of fabricating a pattern comprising sequentially forming a pattern formation layer and a neutral layer on over a substrate having in a first regions and a second regions, forming guide patterns on first portions of over the neutral layer in the second regions, forming a first block copolymer layers on over second portions of the neutral layer in the first regions, phase-separating the tint block copolymer layers such that each of the first block copolymer layers includes to form first polymer blocks having a first phase and first polymer blocks having a second phase, removing the guide patterns to form openings that expose the first portions of the neutral layer in the second region, forming a second block copolymer layer on over the phase-separated first block copolymer layers and in the openings, phase-separating the second block copolymer layer into to form second polymer blocks having the first phase and second polymer blocks having the second phase removing the second polymer blocks having the s
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: February 9, 2016
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Cheol Kyu Bok, Myoung Soo Kim
  • Patent number: 9245796
    Abstract: A method of fabricating an interconnection structure according to an embodiment of the present invention, includes patterning a dielectric layer to form a first recession region, including a first nest-shaped recession region having a first width and a first line-shaped recession region having a second width, which is less than the first width. A guide spacer layer is formed on sidewalls of the first recession region to provide a second recession region including a second nest-shaped recession region in the first nest-shaped recession region. A self-assembling block copolymer material is formed to fill the second nest-shaped recession region. The self-assembling block copolymer material is annealed to form a polymer block domain and a polymer block matrix, surrounding the polymer block domain. The polymer block domain is removed to expose a portion of the dielectric layer. The exposed portion of the dielectric layer is etched to form a via cavity.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: January 26, 2016
    Assignee: SK Hynix Inc.
    Inventors: Keun Do Ban, Cheol Kyu Bok, Min Ae Yoo, Jong Cheon Park