Patents by Inventor Kevin J. Ceurter

Kevin J. Ceurter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10455731
    Abstract: Embodiments herein relate to hydraulic bladders to provide a force against an integrated circuit package to be located between the hydraulic bladder and a system board. In various embodiments, a hydraulic force generator may include a block to be coupled with a system board and a hydraulic bladder to be located between the block and the system board, where the hydraulic bladder, in response to pressurization, is to provide a force against an integrated circuit package to be located between the hydraulic bladder and the system board. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: October 22, 2019
    Assignee: Intel Corporation
    Inventors: Ralph W. Jensen, Jeffory L. Smalley, Kevin J. Ceurter, Devdatta P. Kulkarni, Casey Winkel
  • Publication number: 20190052016
    Abstract: Apparatuses, methods and storage medium associated with connectors for coupling to a computer processing unit (CPU) package are disclosed herein. In embodiments, a connector assembly for connection to a computer processing unit (CPU) package may include a connector housing. One or more electrical contacts of the connector housing may be to couple to the CPU package when the connector assembly is engaged with a mating connector assembly. The connector assembly may further include a mounting handle affixed to a top of the connector housing. The mounting handle may include a locking latch that extends from the mounting handle. The locking latch may engage with a notch within the mating connector assembly that, when engaged, the locking latch may provide a force to maintain coupling of the one or more electrical contacts with the CPU package when engaged with the mating connector assembly.
    Type: Application
    Filed: March 31, 2016
    Publication date: February 14, 2019
    Inventors: Donald T. TRAN, Thomas A. BOYD, Yong WANG, Kevin J. CEURTER, Srikant NEKKANTY, Russell S. AOKI, FeiFei CHENG
  • Patent number: 10178763
    Abstract: Disclosed herein are apparatus, systems, and methods for warpage mitigation in printed circuit board (PCB) assemblies. In some embodiments, a PCB assembly for warpage mitigation may include: a PCB; an interposer disposed on the PCB, wherein the interposer has a first face and an opposing second face, the first face is disposed between the second face and the PCB, conductive contacts are disposed at the second face, solder is disposed on the conductive contacts, the interposer includes a first heater trace proximate to the conductive contacts, and, when a first power is dissipated in the first heater trace, the first heater trace is to generate heat to cause the solder disposed on the conductive contacts to melt; wherein the PCB includes a second heater trace.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: January 8, 2019
    Assignee: Intel Corporation
    Inventors: Rashelle Yee, Russell S. Aoki, Shelby Ferguson, Michael Hui, Jonathon Robert Carstens, Joseph J. Jasniewski, Kevin J. Ceurter
  • Publication number: 20180263137
    Abstract: Embodiments herein relate to hydraulic bladders to provide a force against an integrated circuit package to be located between the hydraulic bladder and a system board. In various embodiments, a hydraulic force generator may include a block to be coupled with a system board and a hydraulic bladder to be located between the block and the system board, where the hydraulic bladder, in response to pressurization, is to provide a force against an integrated circuit package to be located between the hydraulic bladder and the system board. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 13, 2017
    Publication date: September 13, 2018
    Inventors: RALPH W. JENSEN, JEFFORY L. SMALLEY, KEVIN J. CEURTER, DEVDATTA P. KULKARNI, CASEY WINKEL
  • Patent number: 10070526
    Abstract: Techniques and mechanisms to provide a connector for securing to a first printed circuit board (PCB). In an embodiment, the connector is configured to receive a second PCB, where a first hardware interface of the connector includes conductors to facilitate bilateral decoupling from (and coupling to) respective hardware interfaces of the first PCB and the second PCB. A first conductor of the first hardware interface includes a first portion configured to move, relative to a housing structure of the connector, in response to the connector receiving a portion of a device which comprises the second PCB. A second portion of the first conductor is configured to be brought into contact with a conductive pad of the device. In another embodiment, the connector includes housing structures configured to move relative to one another while the connector is secured to the first PCB.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: September 4, 2018
    Assignee: INTEL CORPORATION
    Inventors: Charles C. Phares, Kevin J. Ceurter
  • Publication number: 20180007788
    Abstract: Techniques and mechanisms to provide a connector for securing to a first printed circuit board (PCB). In an embodiment, the connector is configured to receive a second PCB, where a first hardware interface of the connector includes conductors to facilitate bilateral decoupling from (and coupling to) respective hardware interfaces of the first PCB and the second PCB. A first conductor of the first hardware interface includes a first portion configured to move, relative to a housing structure of the connector, in response to the connector receiving a portion of a device which comprises the second PCB. A second portion of the first conductor is configured to be brought into contact with a conductive pad of the device. In another embodiment, the connector includes housing structures configured to move relative to one another while the connector is secured to the first PCB.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 4, 2018
    Inventors: Charles C. PHARES, Kevin J. CEURTER
  • Patent number: 9825387
    Abstract: Embodiments of the present disclosure are directed to a linear edge connector assembly and corresponding bolster plate features for receiving and securing a linear edge connector assembly. Embodiments of the disclosure are directed to a linear edge connector assembly that includes a grooved and indented receiver that can receive a spring loaded ball on the bolster plate. In embodiments, the linear edge connector assembly can include a magnetic element to create a magnetic attraction to magnetic elements on the bolster plate, such as a press-fit ball or a U-shaped hardstop. In some embodiments, the linear edge connector assembly includes a screw or push pin that can be received by a receiver on the bolster plate. The receiver can include a thread or friction fit receiver.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: November 21, 2017
    Assignee: Intel Corporation
    Inventors: Feifei Cheng, Kuang C. Liu, Michael Garcia, Eric W. Buddrius, Kevin J. Ceurter, Jonathon Robert Carstens
  • Publication number: 20170288330
    Abstract: Embodiments of the disclosure are directed to a linear edge connector assembly for connecting to a substrate diving board of a mother board. The linear edge connector assembly can include an electrical interface to electrically connect the contacts on the diving board to one or more conducts of a cable bundle. The linear edge connector assembly can also include a retaining force mechanism. The retaining force mechanism can include a torsional spring, a spring loaded hooking mechanism, or a spring loaded cam and lever. In some embodiments, the linear edge connector can include a notch to receive a latch connected to a bolster plate on the mother board.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 5, 2017
    Applicant: Intel Corporation
    Inventors: Feifei Cheng, Kuang C. Liu, Michael Garcia, Eric W. Buddrius, Kevin J. Ceurter, Anthony P. Valpiani, Jonathon Robert Carstens
  • Publication number: 20170288331
    Abstract: Embodiments of the present disclosure are directed to a linear edge connector assembly and corresponding bolster plate features for receiving and securing a linear edge connector assembly. Embodiments of the disclosure are directed to a linear edge connector assembly that includes a grooved and indented receiver that can receive a spring loaded ball on the bolster plate. In embodiments, the linear edge connector assembly can include a magnetic element to create a magnetic attraction to magnetic elements on the bolster plate, such as a press-fit ball or a U-shaped hardstop. In some embodiments, the linear edge connector assembly includes a screw or push pin that can be received by a receiver on the bolster plate. The receiver can include a thread or friction fit receiver.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 5, 2017
    Inventors: Feifei Cheng, Kuang C. Liu, Michael Garcia, Eric W. Buddrius, Kevin J. Ceurter, Jonathon Robert Carstens
  • Publication number: 20170178994
    Abstract: Disclosed herein are integrated circuit (IC) package support structures, and related systems, devices, and methods. In some embodiments, an IC package support structure may include a first heater trace, and a second heater trace, wherein the second heater trace is not conductively coupled to the first heater trace in the IC package support structure.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Applicant: Intel Corporation
    Inventors: Michael Hui, Rashelle Yee, Jonathan Thibado, Daniel P. Carter, Shelby Ferguson, Anthony P. Valpiani, Russell S. Aoki, Jonathon Robert Carstens, Joseph J. Jasniewski, Harvey R. Kofstad, Michael Brazel, Tracy Clack, Viktor Vogman, Penny Woodcock, Kevin J. Ceurter, Hongfei Yan
  • Publication number: 20170181271
    Abstract: Disclosed herein are apparatus, systems, and methods for warpage mitigation in printed circuit board (PCB) assemblies. In some embodiments, a PCB assembly for warpage mitigation may include: a PCB; an interposer disposed on the PCB, wherein the interposer has a first face and an opposing second face, the first face is disposed between the second face and the PCB, conductive contacts are disposed at the second face, solder is disposed on the conductive contacts, the interposer includes a first heater trace proximate to the conductive contacts, and, when a first power is dissipated in the first heater trace, the first heater trace is to generate heat to cause the solder disposed on the conductive contacts to melt; wherein the PCB includes a second heater trace.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Applicant: Intel Corporation
    Inventors: Rashelle Yee, Russell S. Aoki, Shelby Ferguson, Michael Hui, Jonathon Robert Carstens, Joseph J. Jasniewski, Kevin J. Ceurter