Abstract: A transition frequency multiplier semiconductor device having a first source region, a second source region, and a common drain region is disclosed. A first channel region is located between the first source region and the common drain region, and a second channel region is located between the second source region and the common drain region. A first gate region is located within the first channel region to control current flow between the first source region and the common drain region, while a second gate region is located within the second channel region to control current flow between the second source region and the common drain region. An inactive channel region is located between the first channel region and the second channel region such that the first channel region is electrically isolated from the second channel region.

Abstract: An electronically reconfigurable matching network having a plurality of electronically reconfigurable components is disclosed. Each of the plurality of electronically reconfigurable elements includes a plurality of selectable impedance elements coupled together. Each selectable impedance element includes an impedance element coupled between first and second end terminals and a field-effect transistor (FET)-based switch coupled between the first and second end terminals. The FET-based switch includes a first FET having first and second current terminals coupled to a first gate terminal and a second FET having a third current terminal coupled to the first gate terminal, a fourth current terminal, and a second gate terminal coupled to a first control terminal; and a third FET having a fifth current terminal coupled to the first end terminal, a sixth current terminal coupled to the second end terminal, and a third gate terminal coupled to the third current terminal.

Abstract: Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other.

Abstract: A transition frequency multiplier semiconductor device having a first source region, a second source region, and a common drain region is disclosed. A first channel region is located between the first source region and the common drain region, and a second channel region is located between the second source region and the common drain region. A first gate region is located within the first channel region to control current flow between the first source region and the common drain region, while a second gate region is located within the second channel region to control current flow between the second source region and the common drain region. An inactive channel region is located between the first channel region and the second channel region such that the first channel region is electrically isolated from the second channel region. A conductive interconnect couples the first source region to the second gate region.

Abstract: An active photonic device having a Darlington configuration is disclosed. The active photonic device includes a substrate with a collector layer over the substrate. The collector layer includes an inner collector region and an outer collector region that substantially surrounds the inner collector region. A base layer resides over the collector layer. The base layer includes an inner base region and an outer base region that substantially surrounds and is spaced apart from the inner base region. An emitter layer resides over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. The emitter layer further includes an outer emitter region that is ring-shaped and resides over and extends substantially around the outer base region. A connector structure electrically couples the inner emitter region with the outer base region.

Abstract: A gallium nitride (GaN) power amplifier having a plurality of amplifier stages integrated into a monolithic integrated circuit is disclosed. The plurality of amplifier stages is coupled together between a radio frequency signal input and a radio frequency signal output, wherein at least one of the plurality of amplifier stages includes a first GaN transistor that is configured to have a first breakdown voltage that is no more than 75% of a second breakdown voltage of a second GaN transistor included in a different one of the plurality of amplifier stages.

Abstract: An RF power amplifier includes a quadrature coupler, an in-phase amplifier, a quadrature amplifier, and a feed-forward signal path. The quadrature coupler includes an in-phase input node, a quadrature input node, an isolated node, and an RF signal output node. The in-phase amplifier includes an in-phase amplifier output node coupled to the in-phase input node. The quadrature amplifier includes a quadrature amplifier output node coupled to the quadrature input node. The feed-forward signal path is configured to couple and condition a signal from one of the in-phase amplifier and the quadrature amplifier in order to provide a feed-forward output signal that when provided at the feed-forward output node cancels one or more harmonic signals.

Abstract: An electronically reconfigurable matching network having a plurality of electronically reconfigurable components is disclosed. Each of the plurality of electronically reconfigurable elements includes a plurality of selectable impedance elements coupled together. Each selectable impedance element includes an impedance element coupled between first and second end terminals and a field-effect transistor (FET)-based switch coupled between the first and second end terminals. The FET-based switch includes a first FET having first and second current terminals coupled to a first gate terminal and a second FET having a third current terminal coupled to the first gate terminal, a fourth current terminal, and a second gate terminal coupled to a first control terminal; and a third FET having a fifth current terminal coupled to the first end terminal, a sixth current terminal coupled to the second end terminal, and a third gate terminal coupled to the third current terminal.

Abstract: A reconfigurable load modulation amplifier having a first power amplifier (PA) configured to be supplied by a first drain voltage and a second PA coupled in parallel with the first PA, wherein the second PA is configured to be supplied by a second drain voltage is disclosed. The reconfigurable load modulation amplifier includes a quadrature coupler configured to combine power from both the first PA and the second PA for output through an output port. Also included is control circuitry configured to set at least one of the first drain voltage and the second drain voltage such that the first drain voltage is different than the second drain voltage. In at least one embodiment, the control circuitry is further configured to dynamically adjust at least one of the first drain voltage and the second drain voltage such that the first drain voltage is different than the second drain voltage.

Abstract: An active photonic device having a Darlington configuration is disclosed. The active photonic device has a collector layer over a substrate, a base layer over the collector layer, and an emitter layer over the base layer. A connector structure electrically couples an inner emitter region with an outer base region, wherein the collector layer, base layer, the emitter layer and the connector structure are substantially centered within a first region over the substrate. A feedback resistor is coupled between an inner collector region and an inner base region. At least a portion of the feedback resistor is arc-shaped and resides over a first arcuate path defined by a substantially constant first radius centered in the first region.

Abstract: A reconfigurable low-noise amplifier (LNA) is disclosed. The reconfigurable LNA includes amplifier circuitry having a gate terminal coupled to an input terminal, a source terminal coupled to a fixed voltage node, and a drain terminal coupled to an output terminal. The reconfigurable LNA further includes a gamma inverting network (GIN) coupled between the input terminal and the fixed voltage node, wherein the GIN has a first switch configured to disable the GIN during operation at first frequencies within a lower frequency band relative to a higher frequency band and to enable the GIN during operation at second frequencies within the higher frequency band.

Abstract: A reconfigurable load modulation amplifier having a carrier amplifier and a peak amplifier that are coupled in parallel is disclosed. The peak amplifier provides additional power amplification when the carrier amplifier is driven into saturation. A quadrature coupler coupled between the carrier amplifier and the peak amplifier is configured to combine power from both the carrier amplifier and the peak amplifier for output through an output load terminal. The reconfigurable load modulation amplifier further includes control circuitry coupled to an isolation port of the quadrature coupler and configured to provide adjustable impedance at the isolation port of the quadrature coupler. As such, impedance at the isolation port of the quadrature coupler is tunable such that at least a carrier or peak amplifier is presented with a quadrature coupler load impedance that ranges from around about half an output load termination impedance to around about twice the output load termination impedance.

Abstract: A distributed amplifier (DA) is disclosed. The DA includes a first plurality of inductive elements coupled in series forming a first plurality of connection nodes. The DA also includes a second plurality of inductive elements coupled in series forming a second plurality of connection nodes. The DA further includes a plurality of amplifier cells that each has a main transistor and a cascode transistor coupled into a cascode configuration. The cascode transistor has a current input coupled to a corresponding one of the first plurality of connection nodes. An input transistor has a control terminal coupled to a corresponding one of the second plurality of connection nodes, a current input terminal configured to provide a bias tuning for the DA, and a third current output terminal coupled to a control terminal of the main transistor and configured to provide a separate bias tuning for the DA.

Abstract: A distributed amplifier is disclosed having a plurality of amplifier sections, each having an input gate and an output drain, and a first plurality of inductive elements coupled in series between a DA input terminal and a gate termination terminal to form a first plurality of connection nodes. Each of the connection nodes is coupled to a corresponding adjacent pair of the first plurality of inductive elements and to a corresponding input gate of the plurality of amplifier sections. A second plurality of inductive elements is coupled in series between a drain termination terminal and a DA output terminal to form a second plurality of connection nodes, each being coupled to a corresponding adjacent pair of the second plurality of inductive elements and to a corresponding output drain of the plurality of amplifier sections. An active impedance termination circuitry has a termination output coupled to the drain termination terminal.

Abstract: Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other.

Abstract: Radio frequency (RF) amplification devices are disclosed that include Doherty amplification circuits and methods of operating the same. In one embodiment, a Doherty amplification circuit includes a main carrier RF amplifier, a peaking RF amplifier, and a periodic quadrature coupler. To provide Doherty amplification, the peaking RF amplifier is configured to be deactivated while an RF signal is below a threshold level and is configured to be activated while the RF signal is above the threshold level. The periodic quadrature coupler is configured to combine a first RF split signal from the main carrier RF amplifier and a second RF split signal from the peaking RF amplifier into the RF signal, such that the RF signal is output from an output port while the peaking RF amplifier is activated. The periodic quadrature coupler allows the Doherty amplification circuit to provide broadband amplification in various RF communication bands.

Abstract: A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through an input node is disclosed. The circuit has a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of an amplified version of the input signal that passes through the input transistor. The circuit further includes a bias feedback network that includes a bias transistor and a resistive network that consists of only resistive elements such that no inductors and no capacitors are provided within the bias feedback network.

Abstract: An active photonic device having a Darlington configuration is disclosed. The active photonic device has a collector layer over a substrate, a base layer over the collector layer, and an emitter layer over the base layer. A connector structure electrically couples an inner emitter region with an outer base region, wherein the collector layer, base layer, the emitter layer and the connector structure are substantially centered within a first region over the substrate. A feedback resistor is coupled between an inner collector region and an inner base region. At least a portion of the feedback resistor is arc-shaped and resides over a first arcuate path defined by a substantially constant first radius centered in the first region.

Abstract: A distributed amplifier is disclosed having a plurality of amplifier sections, each having an input gate and an output drain, and a first plurality of inductive elements coupled in series between a DA input terminal and a gate termination terminal to form a first plurality of connection nodes. Each of the connection nodes is coupled to a corresponding adjacent pair of the first plurality of inductive elements and to a corresponding input gate of the plurality of amplifier sections. A second plurality of inductive elements is coupled in series between a drain termination terminal and a DA output terminal to form a second plurality of connection nodes, each being coupled to a corresponding adjacent pair of the second plurality of inductive elements and to a corresponding output drain of the plurality of amplifier sections. An active impedance termination circuitry has a termination output coupled to the drain termination terminal.

Abstract: A field effect transistor having at least one structure configured to redistribute and/or reduce an electric field from gate finger ends is disclosed. Embodiments of the field effect transistor include a substrate, an active region disposed on the substrate, at least one source finger in contact with the active region, at least one drain finger in contact with the active region, and at least one gate finger in rectifying contact with the active region. One embodiment has at least one end of the at least one gate finger extending outside of the active region. Another embodiment includes at least one source field plate integral with the at least one source finger. The at least one source field plate extends over the at least one gate finger that includes a portion outside of the active region. Either embodiment can also include a sloped gate foot to further improve high voltage operation.