Abstract: A motion compensation difference interframe or intra-frame coding system includes a block data redundancy compression and coding unit, a PIXEL data coding unit and a prediction data generator unit. The block data redundancy compression and coding unit codes a motion compensated (MC) difference between an input image in a block and a motion predicted image from the prediction data generator unit, and transmits coded data to a receiver. The PIXEL data coding unit receives an error between the MC difference and a decoded MC difference from the block data redundancy compression and coding unit, rearranges the error in PIXEL data and codes the PIXEL error, when the error is greater than a predetermined value. The PIXEL coded data is also transmitted to the receiver. The prediction data generator unit generates predicted block data of the motion of the image. The redundancy compression and coding unit may include a filter circuit rejecting pulse components contained in the MC difference.

Abstract: An inter-frame encoding/decoding equipment for television signals consists of inter-frame encoding equipment encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives an encoded signal sent from the inter-frame encoding device via a transmission line, which decodes by adding the output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic "1" in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit. The inter-frame decoding equipment is provided with a second operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic "1" in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit.

Abstract: A differential coding circuit including a subtracter, a quantizer for quantizing a differential signal from the subtracter, and a predicted signal generating circuit for generating a predicted signal on the basis of a quantized differential signal from the quantizer. The subtracter subtracts the quantized differential signal of the quantizer and the predicted signal from the sampled input signal. The critical path of the circuit is shortened, therefore the operation speed of the differential coding circuit increases.

Abstract: A differential coding apparatus having a plurality of predictive function computing circuits and an optimum predicted value determining circuit. The optimum predicted value determining circuit determines the optimum predicted value from the plurality of predicted values by using a quantized prediction error used as an output signal of the apparatus, instead of a local decoded signal, and carries out the determining operation of the optimum predicted value in parallel with the quantized prediction error producing operation.

Abstract: In an encoder responsive to a sequence of coefficient blocks each of which is composed of a plurality of orthogonal transform coefficients subjected to predictive encoding and orthogonal transform, the coefficient blocks are classified by a classification circuit (55) into a plurality of classes to produce a control signal (CONT) representative of the classes. A quantization unit (60), a code conversion unit (61), and a coefficient selection unit (62, 64) are controlled by the control signal to select quantization characteristics, code conversion characteristics, and coefficient selection characteristics. The quantization unit comprises a plurality of quantizers corresponding to the quantization characteristics while the code conversion unit and the coefficient selection unit comprise a plurality of code converters and a plurality of selection tables corresponding to the code conversion characteristics and the coefficient selection characteristics, respectively.

Abstract: Inter-frame encoding/decoding equipment for television signals includes inter-frame encoding equipment generating an encoded signal by encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives the encoded signal sent from the inter-frame encoding device via a transmission line. The decoding equipment decodes by adding its output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which calculates remainders obtained by dividing a predetermined value, into bit groups of the output or the input of the frame memory. The inter-frame decoding equipment is provided with a second operation circuit which calculates remainders obtained by dividing, the predetermined value, into the bit groups of the output or the input of its frame memory.

Abstract: An apparatus for band compression processing of a picture signal which generates forecasting error signal and movement vector and updates only the movement vector during a comb-out operation. During comb-out processing, a picture signal is recirculated while the movement vector is produced and accumulated. At the end of the comb-out processing, the change in the movement vector from the accumulated vector is within a desired range. Therefore, the scale of a circuit for detecting the movement vector after the comb-out operation does not increase.

Abstract: A digital data code conversion circuit for a variable-word-length data code includes a data code conversion portion and a preparation circuit. In the preparation circuit, a variable-word-length data code having a word length greater than a number n is divided into a plurality of variable-word-length data codes having a word length less than or equal to the number n. The divided variable-word-length data codes are converted into fixed-word-length data codes having a word length n in the data code conversion portion.