Abstract: An optical network device includes a receiver that receives a polarization multiplexed optical signal and a processor. The processor separates an electric field information signal indicating the polarization multiplexed optical signal into first and second polarization components orthogonal to each other, generates third and fourth polarization components by controlling the first and second polarization components, calculates an evaluation value corresponding to a power of the third or fourth polarization component for each of a plurality of positions on a transmission line, calculates a variation in the evaluation value for a control amount for each of the plurality of positions, and decides whether a first position is a position to be detected based on a result of comparing a variation in an evaluation value for the first position with a variation in an evaluation value for a second position adjacent to the first position.

Abstract: A method includes assigning a symbol corresponding to a value of each of bit strings in a frame among the symbols in a constellation of a multi-level modulation scheme, to bit strings, converting a value of each of the bit strings other than a first bit string such that a symbol closer to a center of the constellation is assigned more among symbols, generating a error correction code for correcting an error of bit strings to insert the error correction code into the first bit string, generating the first error correction code from the bit strings other than the first bit string among bit strings, in a first period in which the error correction code is inserted into the first bit string in a period of the frame, and generating the error correction code from a second bit string in another second period in the period of the frame.

Abstract: An optical network device includes a receiver that receives a polarization multiplexed optical signal and a processor. The processor separates an electric field information signal indicating the polarization multiplexed optical signal into first and second polarization components orthogonal to each other, generates third and fourth polarization components by controlling the first and second polarization components, calculates an evaluation value corresponding to a power of the third or fourth polarization component for each of a plurality of positions on a transmission line, calculates a variation in the evaluation value for a control amount for each of the plurality of positions, and decides whether a first position is a position to be detected based on a result of comparing a variation in an evaluation value for the first position with a variation in an evaluation value for a second position adjacent to the first position.

Abstract: An encoding circuit includes an allocator to allocate a symbol to bit-strings within a first frame, a converter to convert values of target-bit-strings that exclude a predetermined-bit-string so that, as a region within the constellation is closer to a center of the constellation, a number of symbols allocated in the region is larger, a generator to generate an error-correction-code of the bit-strings, and an insertion circuit to delay the error-correction-code and insert the error-correction-code in the predetermined-bit-string within a second frame that succeeds the first frame, wherein the allocator allocates, to the bit-strings, one symbol that corresponds to the values of the target-bit-strings, the one symbol being within a quadrant that corresponds to a value of the predetermined bit-string, and wherein the converter switches, based on the value of the predetermined-bit-string, association relationships between the values of the target-bit-strings before and after the conversion.

Abstract: An encoding circuit includes an allocator to allocate a symbol to bit-strings within a first frame, a converter to convert values of target-bit-strings that exclude a predetermined-bit-string so that, as a region within the constellation is closer to a center of the constellation, a number of symbols allocated in the region is larger, a generator to generate an error-correction-code of the bit-strings, and an insertion circuit to delay the error-correction-code and insert the error-correction-code in the predetermined-bit-string within a second frame that succeeds the first frame, wherein the allocator allocates, to the bit-strings, one symbol that corresponds to the values of the target-bit-strings, the one symbol being within a quadrant that corresponds to a value of the predetermined bit-string, and wherein the converter switches, based on the value of the predetermined-bit-string, association relationships between the values of the target-bit-strings before and after the conversion.

Abstract: A method includes assigning a symbol corresponding to a value of each of bit strings in a frame among the symbols in a constellation of a multi-level modulation scheme, to bit strings, converting a value of each of the bit strings other than a first bit string such that a symbol closer to a center of the constellation is assigned more among symbols, generating a error correction code for correcting an error of bit strings to insert the error correction code into the first bit string, generating the first error correction code from the bit strings other than the first bit string among bit strings, in a first period in which the error correction code is inserted into the first bit string in a period of the frame, and generating the error correction code from a second bit string in another second period in the period of the frame.

Abstract: There is provided an optical transmission device including: a generator configured to convert an electric signal into a plurality of parallel signals, modulate the plurality of parallel signals, shift center frequencies of spectra of the plurality of modulated parallel signals into different frequencies, so as to generate signals accommodated in a plurality of sub-channels each having different center frequencies, and generate a multiplexed signal by multiplexing the signals accommodated in the plurality of sub-channels; a transmitter configured to optical-modulate the multiplexed signal and transmit the optical-modulated signal to an optical reception device; and a controller configured to control a frequency spacing between adjacent sub-channels of the plurality of sub-channels, based on a monitoring result of reception characteristics of the signals accommodated in the plurality of sub-channels within the multiplexed signal in the optical reception device.

Abstract: There is provided an optical transmission device including: a generator configured to convert an electric signal into a plurality of parallel signals, modulate the plurality of parallel signals, shift center frequencies of spectra of the plurality of modulated parallel signals into different frequencies, so as to generate signals accommodated in a plurality of sub-channels each having different center frequencies, and generate a multiplexed signal by multiplexing the signals accommodated in the plurality of sub-channels; a transmitter configured to optical-modulate the multiplexed signal and transmit the optical-modulated signal to an optical reception device; and a controller configured to control a frequency spacing between adjacent sub-channels of the plurality of sub-channels, based on a monitoring result of reception characteristics of the signals accommodated in the plurality of sub-channels within the multiplexed signal in the optical reception device.

Abstract: An optical receiver, includes: a signal processor to perform digital signal processing on a polarization demultiplexed signal obtained by demultiplexing a polarization multiplexed signal corresponding to a reception signal, the signal processor includes: an adaptive equalization circuit to compensate for the polarization demultiplexed signal by control of a filter coefficient; a first frequency offset estimation circuit to receive a first polarization demultiplexed signal diverged at a preceding stage and estimate a first frequency offset; a second frequency offset estimation circuit to receive a second polarization demultiplexed signal diverged at a succeeding stage and estimate a second frequency offset; and a decision circuit to decide whether the filter coefficient is correct based on a first difference between the first frequency offset and the second frequency offset and output, when deciding that the filter coefficient is incorrect, a first trigger for re-calculation of the filter coefficient.

Abstract: An optical receiver, includes: a signal processor to perform digital signal processing on a polarization demultiplexed signal obtained by demultiplexing a polarization multiplexed signal corresponding to a reception signal, the signal processor includes: an adaptive equalization circuit to compensate for the polarization demultiplexed signal by control of a filter coefficient; a first frequency offset estimation circuit to receive a first polarization demultiplexed signal diverged at a preceding stage and estimate a first frequency offset; a second frequency offset estimation circuit to receive a second polarization demultiplexed signal diverged at a succeeding stage and estimate a second frequency offset; and a decision circuit to decide whether the filter coefficient is correct based on a first difference between the first frequency offset and the second frequency offset and output, when deciding that the filter coefficient is incorrect, a first trigger for re-calculation of the filter coefficient.

Abstract: An optical digital coherent receiver includes: a polarization separation circuit configured to perform polarization separation on a received signal and output polarized signals; and a determination circuit configured to trigger a start of digital signal processing in a stage subsequent to the polarization separation circuit when it is determined that a distribution of a peak of an amplitude of one of the polarized signals has a characteristic corresponding to a modulation method used on a transmitting side.

Abstract: An optical digital coherent receiver includes: a polarization separation circuit configured to perform polarization separation on a received signal and output polarized signals; and a determination circuit configured to trigger a start of digital signal processing in a stage subsequent to the polarization separation circuit when it is determined that a distribution of a peak of an amplitude of one of the polarized signals has a characteristic corresponding to a modulation method used on a transmitting side.

Abstract: A signal processing apparatus includes a number P of adaptive equalization filters, P being 2 or more, configured to execute a first computing process for equalization on respective input signals, and to issue output signals; a number N of error calculation circuits, N being not more than P, configured to determine, per adaptive equalization filter, a second computing process to calculate an error in order to reduce a difference between a value of the output signal obtained with the first computing process and a predetermined objective value of the output signal; and an update circuit configured to determine a third computing process based on the second computing process determined per adaptive equalization filter by the error calculation circuit, and to update a computing process, which is executed in the adaptive equalization filter, to the third computing process.

Abstract: A phase synchronization method uses a removal path for removing an error component contained in an input signal and a delay addition path for adding a delay corresponding to a processing time period taken to remove the error component in the removal path. The removal path includes an averaging section. The averaging section includes a shift register and an obtaining unit. The shift register stores as many data as the maximum number of data to be averaged and successively receives processing data from which the error component has been extracted in the removal path. The obtaining unit obtains, among the successive processing data input to the shift register, as many processing data as the number of data to be averaged from a position near the center toward both ends in the shift register.

Abstract: A distortion compensating apparatus which compensates for distortion in a waveform of a received light signal through a digital signal processing includes a plurality of fixed amount compensators which compensate for the distortion in the waveform at respective given compensating amounts. The combination of operating states of the plurality of fixed amount compensators is changed by on/off switching of each of the plurality of fixed amount compensators, and the plurality of fixed amount compensators are cascaded.

Abstract: A phase synchronization method uses a removal path for removing an error component contained in an input signal and a delay addition path for adding a delay corresponding to a processing time period taken to remove the error component in the removal path. The removal path includes an averaging section. The averaging section includes a shift register and an obtaining unit. The shift register stores as many data as the maximum number of data to be averaged and successively receives processing data from which the error component has been extracted in the removal path. The obtaining unit obtains, among the successive processing data input to the shift register, as many processing data as the number of data to be averaged from a position near the center toward both ends in the shift register.

Abstract: A distortion compensating apparatus which compensates for distortion in a waveform of a received light signal through a digital signal processing includes a plurality of fixed amount compensators which compensate for the distortion in the waveform at respective given compensating amounts. The combination of operating states of the plurality of fixed amount compensators is changed by on/off switching of each of the plurality of fixed amount compensators, and the plurality of fixed amount compensators are cascaded.

Abstract: A network monitoring device that monitors a network state, includes a receiving unit that receives a packet passing through the network; a processing unit that performs analysis of the network state with respect to the packet received; and a determining unit that determines whether a failure has occurred in the network, based on the result obtained by the processing unit.

Abstract: A layer 2 loop detection apparatus includes a unit recognizing a topology of an L2 network at normal time by collecting MIB information including information concerning ports of a plurality of L2 switches from the plurality of L2 switches through SNMP communication; a unit discriminating, based on a topology recognition processing, a blocking port for traffic blocking and a disable port under a port disable state each set under a Spanning Tree Protocol (STP); a unit setting each of the blocking port and the disable port as a monitoring point and periodically monitoring a state thereof; and a unit performing detection of an L2 loop by re-collecting a part of the MIB information from the plurality of L2 switches through SNMP communication and re-recognizing the topology of the L2 network, the detection of the L2 loop detection being triggered by a change of a state of one of the blocking port and the disable port.

Abstract: A network monitoring device that monitors a network state, includes a receiving unit that receives a packet passing through the network; a processing unit that performs analysis of the network state with respect to the packet received; and a determining unit that determines whether a failure has occurred in the network, based on the result obtained by the processing unit.