Patents by Inventor Kikuzo Sawada

Kikuzo Sawada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9875635
    Abstract: Provided is a proximity detection system which is capable of changing a level of alarm depending on a distance between a worker and an apparatus, and setting an alarm-generating distance in an apparatus-side unit. The proximity detection system comprises a magnetic field detecting function-equipped RFID tag attachable to a worker, and a distance detection control unit installable in a self-propelled apparatus. The magnetic field detecting function-equipped RFID tag is configured to be selectively set between a plurality of levels of magnetic field detecting sensitivity, and comprises means to intermittently transmit setup magnetic field detecting sensitivity data and magnetic field detection data. The distance detection control unit is configured to output different levels of alarm according to the data received from the RFID tag.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: January 23, 2018
    Assignee: YOSHIKAWA KOGYO CO. LTD.
    Inventor: Kikuzo Sawada
  • Publication number: 20140361903
    Abstract: Provided is a proximity detection system which is capable of changing a level of alarm depending on a distance between a worker and an apparatus, and setting an alarm-generating distance in an apparatus-side unit. The proximity detection system comprises a magnetic field detecting function-equipped RFID tag attachable to a worker, and a distance detection control unit installable in a self-propelled apparatus. The magnetic field detecting function-equipped RFID tag is configured to be selectively set between a plurality of levels of magnetic field detecting sensitivity, and comprises means to intermittently transmit setup magnetic field detecting sensitivity data and magnetic field detection data. The distance detection control unit is configured to output different levels of alarm according to the data received from the RFID tag.
    Type: Application
    Filed: January 10, 2013
    Publication date: December 11, 2014
    Inventor: Kikuzo Sawada
  • Patent number: 8497763
    Abstract: The data carrier has a communication protocol storage unit storing a communication protocol for communicating with an external communication device, an RF analogue receiver receiving an interrogation signal from the external communication device as an RF signal, a contact communication end terminal unit performing contact communication with the external communication device, a communication command controller controlling a command used in an RF communication protocol performed via said RF analogue receiver or a contact-type serial communication protocol performed via said contact communication end terminal unit, and a connection selector selectively connecting one of said RF analogue receiver and said contact communication end terminal unit with said communication command controller.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: July 30, 2013
    Assignees: Yoshikawa RF Systems Co., Ltd., Fuji Xerox Co., Ltd.
    Inventors: Kikuzo Sawada, Takashi Kubo, Yoshikazu Sugawara, Kenji Suzuki
  • Patent number: 8109445
    Abstract: A region to store authentication commands to perform authentication between a data carrier and a reader/writer device is divided into at least three areas, and as for the three areas, a first authentication command is stored in a first area, a second authentication command is stored in a second area, and a third authentication command is stored in a third area, and security levels can be selected depending on a command of an inquiry signal (41) transmitted from a reader/writer device (10), and thereby selection of the security level suitable for circumstances can be realized by a simple constitution.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: February 7, 2012
    Assignee: Yoshikawa RF Systems Co., Ltd.
    Inventors: Kikuzo Sawada, Yoshikazu Sugawara, Takashi Kubo
  • Patent number: 7834753
    Abstract: Both RF communication and contact serial communication can be performed with the use of: communication protocol storage unit for storing a communication protocol for performing communication with an external communication apparatus; a coil terminal section provided with two coil terminals for performing communication with the external communication apparatus with an RF signal; a contact communication terminal section provided with a first communication terminal, a second communication terminal, a power supply voltage terminal and a ground terminal as contact communication terminals for performing contact communication with the external communication apparatus; and connection control unit for causing the power supply voltage terminal and a power supply of an internal switch circuit to be in contact or non-contact with each other depending on the level of voltage applied to the first and second communication terminals.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: November 16, 2010
    Assignee: Yoshikawa RF Systems Co., Ltd.
    Inventors: Yoshikazu Sugawara, Naotaka Yasuda, Takashi Kubo, Kikuzo Sawada, Yuming Tang
  • Publication number: 20100243731
    Abstract: A region to store authentication commands to perform authentication between a data carrier and a reader/writer device is divided into at least three areas, and as for the three areas, a first authentication command is stored in a first area, a second authentication command is stored in a second area, and a third authentication command is stored in a third area, and security levels can be selected depending on a command of an inquiry signal (41) transmitted from a reader/writer device (10), and thereby selection of the security level suitable for circumstances can be realized by a simple constitution.
    Type: Application
    Filed: August 30, 2007
    Publication date: September 30, 2010
    Applicant: YOSHIKAWA RF SYSTEMS Co., Ltd.
    Inventors: Kikuzo Sawada, Yoshikazu Sugawara, Takashi Kubo
  • Publication number: 20100052860
    Abstract: The data carrier has a communication protocol storage unit storing a communication protocol for communicating with an external communication device, an RF analogue receiver receiving an interrogation signal from the external communication device as an RF signal, a contact communication end terminal unit performing contact communication with the external communication device, a communication command controller controlling a command used in an RF communication protocol performed via said RF analogue receiver or a contact-type serial communication protocol performed via said contact communication end terminal unit, and a connection selector selectively connecting one of said RF analogue receiver and said contact communication end terminal unit with said communication command controller.
    Type: Application
    Filed: November 27, 2007
    Publication date: March 4, 2010
    Applicants: YOSHIKAWA RF SYSTEMS CO., LTD., FUJI XEROX CO., LTD.
    Inventors: Kikuzo Sawada, Takashi Kubo, Yoshikazu Sugawara, Kenji Suzuki
  • Publication number: 20100013605
    Abstract: Command control is performed by the same command control unit even in the communication in which either an RF analog section or a contact communication terminal section is used, and thereby, both of RF communication and contact-type serial communication can be performed by using a predetermined communication protocol stored in a storage unit in common, and both of the RF communication and the contact-type serial communication can be performed by using the single communication protocol, resulting that a circuit configuration of a data carrier capable of performing the RF communication and the contact-type serial communication can be simplified, and memory capacity necessary for storing the communication protocol can be reduced.
    Type: Application
    Filed: August 30, 2007
    Publication date: January 21, 2010
    Applicant: YOSHIKKAWA RF SYSTEMS CO., LTD.
    Inventors: Kikuzo Sawada, Yoshikazu Sugawara, Takashi Kubo
  • Publication number: 20090314830
    Abstract: Both of a proximity communication command in order to perform proximity communication with a reader/writer device and a vicinity communication command in order to perform vicinity communication with the reader/writer device are held in a command holding unit, and in the case when being inquired from the reader/writer device by using the proximity communication command, a response signal is generated by using the proximity communication command, and in the case when being inquired from the reader/writer device by using the vicinity communication command, the response signal is generated by using the vicinity communication command, resulting that both of the proximity communication and the vicinity communication can be performed depending on a usage mode.
    Type: Application
    Filed: August 30, 2007
    Publication date: December 24, 2009
    Applicant: YOSHIKAWA RF SYSTEMS Co., Ltd.
    Inventors: Kikuzo Sawada, Yoshikazu Sugawara, Takashi Kubo
  • Publication number: 20080100415
    Abstract: Both RF communication and contact serial communication can be performed with the use of: communication protocol storage unit for storing a communication protocol for performing communication with an external communication apparatus; a coil terminal section provided with two coil terminals for performing communication with the external communication apparatus with an RF signal; a contact communication terminal section provided with a first communication terminal, a second communication terminal, a power supply voltage terminal and a ground terminal as contact communication terminals for performing contact communication with the external communication apparatus; and connection control unit for causing the power supply voltage terminal and the power supply of the internal circuit to be in contact or non-contact with each other depending on the level of voltage applied to the first and second communication terminals.
    Type: Application
    Filed: October 29, 2007
    Publication date: May 1, 2008
    Applicant: Yoshikawa RF Systems Co., Ltd.
    Inventors: Yoshikazu Sugawara, Naotaka Yasuda, Takashi Kubo, Kikuzo Sawada, Yuming Tang
  • Patent number: 7355879
    Abstract: One main electrode of a TFT is connected with one terminal of a two-terminal type nonvolatile memory element, a gate electrode of the TFT is connected with a word line, and the other main electrode thereof is connected with a bit line. The other terminal of the memory element is connected with a base line. A fixed resistor is connected between a connecting point between the other main electrode of the TFT and the bit line and an input terminal of the bit line. In information writing for changing the memory element whose initial state is a low impedance state to a high impedance state, voltages having polarities reverse relative to a reference voltage are applied to the input terminal of the bit line and an input terminal of the base line, respectively, so that a high voltage necessary to change the state is applied between both the terminals of the memory element.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: April 8, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tadahiko Hirai, Kikuzo Sawada
  • Publication number: 20060262589
    Abstract: One main electrode of a TFT is connected with one terminal of a two-terminal type nonvolatile memory element, a gate electrode of the TFT is connected with a word line, and the other main electrode thereof is connected with a bit line. The other terminal of the memory element is connected with a base line. A fixed resistor is connected between a connecting point between the other main electrode of the TFT and the bit line and an input terminal of the bit line. In information writing for changing the memory element whose initial state is a low impedance state to a high impedance state, voltages having polarities reverse relative to a reference voltage are applied to the input terminal of the bit line and an input terminal of the base line, respectively, so that a high voltage necessary to change the state is applied between both the terminals of the memory element.
    Type: Application
    Filed: December 7, 2004
    Publication date: November 23, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Tadahiko Hirai, Kikuzo Sawada
  • Patent number: 7102422
    Abstract: The semiconductor booster circuit includes a plurality of stages, each of which has a MOS transistor and two capacitors. The MOS transistor, having a drain, a source and a gate, is formed in a well of a substrate portion. One capacitor has a terminal connected to the drain of the MOS transistor, while the other capacitor has a terminal connected to the gate of the MOS transistor. A first clock signal generating means generate a first clock signal via another terminal of one capacitor. A second clock signal generating mean s generate a second clock signal, with a larger amplitude than a power supply voltage, via another terminal of another capacitor. The plurality of stages are cascaded together, and in each of the stages the source of the MOS transistor is electrically connected to the well in which the transistor is formed, while the wells are electrically insulated from each other.
    Type: Grant
    Filed: April 18, 1995
    Date of Patent: September 5, 2006
    Assignee: Nippon Steel Corporation
    Inventors: Kikuzo Sawada, Yoshikazu Sugawara
  • Publication number: 20060132288
    Abstract: A method of reading information from and writing information onto an RF tag that resonates by electromagnetic inductance, the RF tag including at least two sets of electromagnetic resonance circuits having mutually different resonance frequencies, the at least two sets of electromagnetic resonance circuits having at least one of a resistor and a capacitor, a fuse or antifuse element capable of selecting a low impedance state and a high impedance state on the basis of an electrical signal, and a coil antenna, is provided.
    Type: Application
    Filed: November 23, 2005
    Publication date: June 22, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Tadahiko Hirai, Keiichi Murai, Kikuzo Sawada
  • Publication number: 20060109264
    Abstract: A field-effect transistor (T2SW) in a semiconductor integrated circuit is driven by periodically applying positive and negative voltage pulses, with reference to the voltage applied to the source and drain electrodes, to the gate electrode. Stable operation of integrated circuit is realized by a simple method, even if the integrated circuit includes a field-effect transistor exhibiting a readily fluctuating threshold voltage.
    Type: Application
    Filed: March 25, 2004
    Publication date: May 25, 2006
    Applicant: CANNON KABUSHIKI KAISHA
    Inventors: Tadahiko Hirai, Kikuzo Sawada
  • Patent number: 6603346
    Abstract: A semiconductor booster circuit includes: a plurality of stages, each having a first MOS transistor and a first capacitor having one terminal connected to a drain terminal of the first MOS transistor, the stages being connected in series by connecting the first MOS transistors of the stages in cascade; and at least one of a first arrangement wherein a source terminal of the first MOS transistor of each of the stages is electrically connected to its substrate, and the substrates of the first MOS transistors in the plurality of stages are electrically insulated from one another, and a second arrangement wherein one terminal of a second capacitor is connected to a gate terminal of the first MOS transistor of each of the stages, and a first clock signal generating unit for inputting a first clock signal to the other terminal of the first capacitor in each stage and a second clock signal generating unit for inputting a second clock signal having a larger amplitude than a power supply voltage (Vdd) to the other ter
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: August 5, 2003
    Assignee: Nippon Steel Corporation
    Inventors: Kikuzo Sawada, Yoshikazu Sugawara
  • Publication number: 20020125935
    Abstract: A semiconductor booster circuit includes: a plurality of stages, each having a first MOS transistor and a first capacitor having one terminal connected to a drain terminal of the first MOS transistor, the stages being connected in series by connecting the first MOS transistors of the stages in cascade; and at least one of a first arrangement wherein a source terminal of the first MOS transistor of each of the stages is electrically connected to its substrate, and the substrates of the first MOS transistors in the plurality of stages are electrically insulated from one another, and a second arrangement wherein one terminal of a second capacitor is connected to a gate terminal of the first MOS transistor of each of the stages, and a first clock signal generating unit for inputting a first clock signal to the other terminal of the first capacitor in each stage and a second clock signal generating unit for inputting a second clock signal having a larger amplitude than a power supply voltage (Vdd) to the other ter
    Type: Application
    Filed: February 1, 2002
    Publication date: September 12, 2002
    Applicant: NIPPON STEEL CORPORATION
    Inventors: Kikuzo Sawada, Yoshikazu Sugawara
  • Patent number: 6000843
    Abstract: An electrically alterable nonvolatile semiconductor memory device has a first memory array including a plurality of first memory cells and a second memory array including at least one second memory cell, wherein contents of the first memory array and contents of the second memory array are capable of being altered independently of each other and variation of a specific quality of each second memory cell due to altering of the contents of the second memory cell is examined, in order to estimate the life of the first memory array.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: December 14, 1999
    Assignee: Nippon Steel Corporation
    Inventor: Kikuzo Sawada
  • Patent number: 5592003
    Abstract: The promotion of reduction of the power source voltage for use in a nonvolatile semiconductor memory is attained by using a method wherein memory cells each of which includes a control gate having a floating gate above a channel region, and a source constituted by an N-type impurity diffusion layer enclosed with a high impurity concentrated P-type diffusion layer containing impurities the impurity concentration of which is higher than that of a P-type well are formed in double wells made up of an N-type well and the P-type well which are formed in a P-type silicon substrate, the electric potentials at the N-type well and the P-type well are controlled independently to each other to write data to the memory cell by utilizing the tunnel phenomenon, the electrical potential at the P-type well is made negative, and under this condition, a relatively low positive voltage and a high voltage are respectively applied to the control gate and the source and the hot electrons generated in the vicinity of the source are
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: January 7, 1997
    Assignee: Nippon Steel Corporation
    Inventors: Yasuo Sato, Kikuzo Sawada
  • Patent number: 5557572
    Abstract: An electrically alterable non-volatile semiconductor memory device includes a plurality of electrically alterable memory cells arranged in columns and rows, a decoder circuit which selects at least one of the plurality of memory cells and does not select others, a writing circuit for writing a selected data in the selected memory cell through the decoder circuit, a reading circuit for reading a data stored in the selected memory cell through the decoder circuit, a comparing circuit for holding the data stored in the selected memory cell and data to be written in the memory cell and comparing both the data with each other, a judging circuit for judging whether the stored data in the selected memory cell is required to be altered or not on the basis of the comparison result of the comparing circuit, and an alteration control circuit for performing altering of the data of the memory cell when stored data is required to be altered on the basis of the judgment result of the judging circuit.
    Type: Grant
    Filed: September 16, 1994
    Date of Patent: September 17, 1996
    Assignee: Nippon Steel Corporation
    Inventors: Kikuzo Sawada, Hiroshi Mawatari