Patents by Inventor Kimberly Davis

Kimberly Davis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11958852
    Abstract: The present invention relates to use of particular substituted heterocycle fused gamma-carbolines as described herein, in free, pharmaceutically acceptable salt or prodrug form, and pharmaceutical composition comprising the same optionally in combination with one or more agents, for the prophylaxis or treatment of one or more disorders associated with dementia, particularly behavioral or mood disturbances (e.g., agitation/aggression), psychosis, depression and sleep disturbances among others in patients suffering from dementia.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: April 16, 2024
    Assignee: INTRA-CELLULAR THERAPIES, INC.
    Inventors: Sharon Mates, Robert Davis, Kimberly Vanover, Lawrence Wennogle
  • Publication number: 20240066030
    Abstract: The disclosure provides methods for the treatment of Bipolar II Disorder, comprising administering to a patient in need thereof, a therapeutically effective amount of lumateperone, in free or pharmaceutically acceptable salt form, optionally in deuterated form.
    Type: Application
    Filed: October 25, 2023
    Publication date: February 29, 2024
    Applicant: INTRA-CELLULAR THERAPIES, INC.
    Inventors: Sharon MATES, Robert DAVIS, Kimberly VANOVER
  • Patent number: 9594717
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: March 14, 2017
    Assignee: INTEL CORPORATION
    Inventors: Kimberly Davis, Mark Sullivan, James Mitchell, Patrick Themins
  • Publication number: 20150199294
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Application
    Filed: March 27, 2015
    Publication date: July 16, 2015
    Applicant: INTEL CORPORATION
    Inventors: Kimberly DAVIS, Mark SULLIVAN, James MITCHELL, Patrick THEMINS
  • Patent number: 8996780
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: March 31, 2015
    Assignee: Intel Corporation
    Inventors: Kimberly Davis, Mark Sullivan, James Mitchell, Patrick Themins
  • Publication number: 20130042045
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 14, 2013
    Inventors: Kimberly DAVIS, Mark Sullivan, James Mitchell, Patrick Themins
  • Patent number: 8244951
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: August 14, 2012
    Assignee: Intel Corporation
    Inventors: Kimberly Davis, Mark Sullivan, James Mitchell, Patrick Themins
  • Publication number: 20100074264
    Abstract: A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables the hosts to send interrupt generating packets to each other.
    Type: Application
    Filed: September 25, 2008
    Publication date: March 25, 2010
    Inventors: Kimberly Davis, Mark Sullivan, James Mitchell, Patrick Themins
  • Publication number: 20060087722
    Abstract: Systems and methods for controlling temperature in an optical amplification system are provided. An optical amplification system comprises a pump laser, a multiplexer, an optical fiber, a temperature control device, and processing circuitry. The pump laser generates an optical pump signal. The multiplexer multiplexes the optical pump signal and an input optical signal to generate a multiplexed optical signal. The optical fiber receives the multiplexed optical signal. The temperature control device controls temperature within the optical amplification system based on a control signal. The processing circuitry determines whether to adjust the temperature of the optical amplification system and generates the control signal based on this determination.
    Type: Application
    Filed: March 21, 2005
    Publication date: April 27, 2006
    Inventors: Paul Krizan, Kimberly Davis, Steven Taliaferro
  • Patent number: 6785806
    Abstract: A BIOS having a set of effectors to initialize harware within the system. The BIOS having a set of macros, each macro of the set of macros having a reference to an effector of the set of effectors, each macro of the set of macros having a set of arguments.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: Joseph A. Schaefer, Michael F. Kartoz, Robert L. Huff, Kimberly A. Davis, Kirk Brannock, Donald Hewett, Daniel A. Rich, William J. Chalmers
  • Patent number: 6732261
    Abstract: In one embodiment, the invention is a method. The method includes receiving expected values of a configuration. The method also includes comparing the expected values with values of a configuration database. Furthermore, the method includes reporting results of the comparing.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventors: William J. Chalmers, Joseph A. Schaefer, Kimberly A. Davis, Don G. Craven, Daniel A. Rich
  • Publication number: 20030182545
    Abstract: In one embodiment, the invention is a method. The method includes receiving expected values of a configuration. The method also includes comparing the expected values with values of a configuration database. Furthermore, the method includes reporting results of the comparing.
    Type: Application
    Filed: December 30, 1999
    Publication date: September 25, 2003
    Inventors: WILLIAM J. CHALMERS, JOSEPH A. SCHAEFER, KIMBERLY A. DAVIS, DON G. CRAVEN, DANIEL A. RICH
  • Patent number: 6594663
    Abstract: In one embodiment, the invention is an apparatus. The apparatus includes a first d-node having a pointer to a subordinate d-node and an identifier. The apparatus also includes a set of d-nodes, each d-node of the set of d-nodes having an identifier, a pointer to a peer d-node, a pointer to a subordinate d-node and a pointer to an entry. The set of d-nodes is accessible through the pointer of the first d-node. The apparatus also includes a set of entries, each entry of the set of entries having an identifier, a type, a value, and a pointer to an entry. The value of each entry embodies data corresponding to a configuration of a system.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: July 15, 2003
    Assignee: Intel Corporation
    Inventors: Joseph A. Schaefer, Michael F. Kartoz, Robert L. Huff, Kimberly A. Davis, Kirk Brannock, Donald Hewett, William J. Chalmers
  • Publication number: 20030088535
    Abstract: In one embodiment, the invention is an apparatus. The apparatus includes a first d-node having a pointer to a subordinate d-node and an identifier. The apparatus also includes a set of d-nodes, each d-node of the set of d-nodes having an identifier, a pointer to a peer d-node, a pointer to a subordinate d-node and a pointer to an entry. The set of d-nodes is accessible through the pointer of the first d-node. The apparatus also includes a set of entries, each entry of the set of entries having an identifier, a type, a value, and a pointer to an entry. The value of each entry embodies data corresponding to a configuration of a system.
    Type: Application
    Filed: December 30, 1999
    Publication date: May 8, 2003
    Inventors: JOSEPH A. SCHAEFER, MICHAEL F. KARTOZ, ROBERT L. HUFF, KIMBERLY A. DAVIS, KIRK BRANNOCK, DONALD HEWETT, WILLIAM J. CHALMERS
  • Patent number: D471112
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: March 4, 2003
    Assignee: Nantucket Allserve, Inc.
    Inventors: Kimberly Davis, Chris Testa