Patents by Inventor Kimihiro Higuchi

Kimihiro Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9728381
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: August 8, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akihiro Kikuchi, Satoshi Kayamori, Shinya Shima, Yuichiro Sakamoto, Kimihiro Higuchi, Kaoru Oohashi, Takehiro Ueda, Munehiro Shibuya, Tadashi Gondai
  • Patent number: 9437402
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: September 6, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akihiro Kikuchi, Satoshi Kayamori, Shinya Shima, Yuichiro Sakamoto, Kimihiro Higuchi, Kaoru Oohashi, Takehiro Ueda, Munehiro Shibuya, Tadashi Gondai
  • Publication number: 20150083332
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Application
    Filed: December 5, 2014
    Publication date: March 26, 2015
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akihiro KIKUCHI, Satoshi KAYAMORI, Shinya SHIMA, Yuichiro SAKAMOTO, Kimihiro HIGUCHI, Kaoru OOHASHI, Takehiro UEDA, Munehiro SHIBUYA, Tadashi GONDAI
  • Publication number: 20150083333
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Application
    Filed: December 5, 2014
    Publication date: March 26, 2015
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akihiro KIKUCHI, Satoshi KAYAMORI, Shinya SHIMA, Yuichiro SAKAMOTO, Kimihiro HIGUCHI, Kaoru OOHASHI, Takehiro UEDA, Munehiro SHIBUYA, Tadashi GONDAI
  • Patent number: 8904957
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: December 9, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Akihiro Kikuchi, Satoshi Kayamori, Shinya Shima, Yuichiro Sakamoto, Kimihiro Higuchi, Kaoru Oohashi, Takehiro Ueda, Munehiro Shibuya, Tadashi Gondai
  • Patent number: 8387562
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: March 5, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Akihiro Kikuchi, Satoshi Kayamori, Shinya Shima, Yuichiro Sakamoto, Kimihiro Higuchi, Kaoru Oohashi, Takehiro Ueda, Munehiro Shibuya, Tadashi Gondai
  • Patent number: 8343372
    Abstract: A surface processing method for a mounting stage, which enables a mounting surface conforming to a substrate to be formed while saving time and effort. The substrate is mounted on a mounting surface of the mounting stage disposed in a housing chamber of a substrate processing apparatus that carries out plasma processing on the substrate. The mounted substrate is thermally expanded.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: January 1, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Tadashi Aoto, Eiichiro Kikuchi, Masakazu Higuma, Kimihiro Higuchi
  • Patent number: 8287750
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: October 16, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Toshihiko Shindo, Shin Okamoto, Kimihiro Higuchi
  • Publication number: 20120006492
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 12, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akihiro KIKUCHI, Satoshi Kayamori, Shinya Shima, Yuichiro Sakamoto, Kimihiro Higuchi, Kaoru Oohashi, Takehiro Ueda, Munehiro Shibuya, Tadashi Gondai
  • Patent number: 8056503
    Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: November 15, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Akihiro Kikuchi, Satoshi Kayamori, Shinya Shima, Yuichiro Sakamoto, Kimihiro Higuchi, Kaoru Oohashi, Takehiro Ueda, Munehiro Shibuya, Tadashi Gondai
  • Publication number: 20110240221
    Abstract: A plasma processing apparatus includes a processing chamber; a lower electrode provided in the processing chamber and having a base made of a conductive metal to which a high frequency power is applied, the lower electrode also serving as a mounting table for mounting thereon a target substrate; an upper electrode provided in the processing chamber to face the lower electrode; and a focus ring disposed above the lower electrode to surround the target substrate. An electrical connection mechanism is provided between the base of the lower electrode and the focus ring to electrically connect the base of the lower electrode to the focus ring through a current control element, and generates a DC current in accordance with a potential difference.
    Type: Application
    Filed: March 30, 2011
    Publication date: October 6, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Takashi Yamamoto, Shunsuke Mizukami, Ryuji Ohtani, Kimihiro Higuchi
  • Patent number: 7799238
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: September 21, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Toshihiko Shindo, Shin Okamoto, Kimihiro Higuchi
  • Patent number: 7713431
    Abstract: A plasma processing apparatus for converting a processing gas into a plasma by a high frequency power in a processing chamber and performing a plasma processing on a substrate mounted on a mounting table includes a ring portion disposed to surround the substrate on the mounting table, and a temperature control unit for establishing a temperature difference between the ring portion and the substrate, such that the ring portion is at least 50° C. higher than the substrate. Further, the processing gas generates chlorine radicals, and the temperature control unit is at least one of a heating unit for heating the ring portion and a cooling unit for cooling the mounting table.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: May 11, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Tomoaki Ukei, Kimihiro Higuchi, Tatsuo Matsudo, Kazuki Denpoh
  • Publication number: 20100112819
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Application
    Filed: January 13, 2010
    Publication date: May 6, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshihiko SHINDO, Shin Okamoto, Kimihiro Higuchi
  • Publication number: 20090212017
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Application
    Filed: April 30, 2009
    Publication date: August 27, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshihiko SHINDO, Shin Okamoto, Kimihiro Higuchi
  • Patent number: 7541283
    Abstract: A plasma processing method for performing a plasma process on a substrate to be processed by making a plasma act thereon includes the following sequential steps of making a plasma weaker than one used in the plasma process act on the substrate, applying a DC voltage to an electrostatic chuck for attracting and holding the substrate while the weak plasma acts on the substrate, extinguishing the weak plasma, and performing the plasma process. Further, a plasma processing apparatus includes a plasma processing mechanism for performing a plasma process on a substrate to be processed, and a controller for controlling the plasma processing mechanism to thereby perform the plasma processing method.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: June 2, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Toshihiko Shindo, Shin Okamoto, Kimihiro Higuchi
  • Patent number: 7465673
    Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O); forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute an NH3/O2, N2/H2/O2, N2/H2/CO, NH3/CO, or NH3/CO/O2 based chemistry. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O).
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: December 16, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Yoshiki Igarashi, Kouichiro Inazawa, Kimihiro Higuchi, Vaidyanathan Balasubramaniam, Eiichi Nishimura, Ralph Kim, Philip Sansone, Masaaki Hagihara
  • Publication number: 20080237030
    Abstract: A surface processing method for a mounting stage, which enables a mounting surface conforming to a substrate to be formed while saving time and effort. The substrate is mounted on a mounting surface of the mounting stage disposed in a housing chamber of a substrate processing apparatus that carries out plasma processing on the substrate. The mounted substrate is thermally expanded.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tadashi Aoto, Eiichiro Kikuchi, Masakazu Higuma, Kimihiro Higuchi
  • Patent number: 7335278
    Abstract: An electrostatic chuck 108 is provided on a lower electrode 106 provided inside a processing chamber 102 of an etching apparatus 100, and a conductive inner ring body 112a and an insulating outer ring body 112b are encompassing the outer edges of a wafer W mounted on the chuck surface. The temperatures of the wafer W and the inner and outer ring bodies 112a and 112b are detected by first˜third temperature sensors 142, 144 and 146. A controller 140 controls the pressure levels of He supplied to the space between the center of the wafer W and the electrostatic chuck 108 via first gas outlet ducts 114 and to the space between the outer edges of the wafer W and the electrostatic chuck 108 via second gas outlet ducts 116 and the quantity of heat generated by a heater 148 inside the outer ring body 112b based upon the information on the temperatures thus detected so that the temperatures of the wafer W and the inner ring body 112a are set roughly equal to each other.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: February 26, 2008
    Assignees: Tokyo Electron AT Limited
    Inventors: Chishio Koshimizu, Hiroyuki Ishihara, Kimihiro Higuchi, Koji Maruyama
  • Publication number: 20060081337
    Abstract: A capacitive coupling plasma processing apparatus includes a process chamber configured to have a vacuum atmosphere, and a process gas supply section configured to supply a process gas into the chamber. In the chamber, a first electrode serving as a cathode electrode, and a second electrode grounded to serve as an anode electrode are disposed opposite each other. An RF power supply is disposed to supply an RF power to the first electrode to form an RF electric field within a plasma generation region between the first and second electrodes, so as to turn the process gas into plasma. The target substrate is supported by a support member between the first and second electrodes such that a process target surface thereof faces the second electrode. The second electrode includes a conductive counter surface facing the first electrode and exposed to the plasma generation region.
    Type: Application
    Filed: December 2, 2005
    Publication date: April 20, 2006
    Inventors: Shinji Himori, Kimihiro Higuchi, Tatsuo Matsudo, Etsuo Iijima, Hiroharu Ito, Shoichiro Matsuyama, Noriaki Imai, Kazuya Nagaseki