Patents by Inventor Kimitoshi Yamada

Kimitoshi Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060003744
    Abstract: In the conventional method for providing users with news or other information, there is a system in which information represented by characters or voices is sent to the users. However, if the users do not hear all of the information that is transformed into the voice-data or character-data, they cannot understand it. Thus, they cannot easily, or quickly, get their favorite news or other information. The purpose of this invention is to provide a method for easily, anytime, quickly, and anywhere, providing one's favorite news or other information by using communication networks which connect cellular phones or portable terminals to communicating stations.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 5, 2006
    Inventors: Hiroshi Kaneko, Mutsuko Oba, Kimitoshi Yamada
  • Patent number: 6970912
    Abstract: A computer system having a plurality of computers connected to each other by a computer coupling mechanism. Each computer includes a processor, memory, I/O device, disk control mechanism, computer coupling network adapter, disk requirement processing section connected to a system bus, and a disk connected to a disk control mechanism. The disk requirement processing section controls the disk, in response to a processing requirement for the disk from one of the processors of the other computers, based on structural definition information. The structural definition information describes a structure of the computer system. The computer system may be a loosely-coupled computer system.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: November 29, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Murayama, Hiroshi Yashiro, Satoshi Yoshizawa, Kazuo Horikawa, Takehisa Hayashi, Hiroshi Iwamoto, Kimitoshi Yamada
  • Publication number: 20030126420
    Abstract: A computer system having a plurality of computers connected to each other by a computer coupling mechanism. Each computer includes a processor, memory, I/O device, disk control mechanism, computer coupling network adapter, disk requirement processing section connected to a system bus, and a disk connected to a disk control mechanism. The disk requirement processing section controls the disk, in response to a processing requirement for the disk from one of the processors of the other computers, based on structural definition information. The structural definition information describes a structure of the computer system. The computer system may be a loosely-coupled computer system.
    Type: Application
    Filed: May 18, 1999
    Publication date: July 3, 2003
    Inventors: HIDEKI MURAYAMA, HIROSHI YASHIRO, SATOSHI YOSHIZAWA, KAZUO HORIKAWA, TAKEHISA HAYASHI, HIROSHI IWAMOTO, KIMITOSHI YAMADA
  • Patent number: 5935205
    Abstract: A computer system having a plurality of computers connected to each other by a computer coupling mechanism. Each computer includes a processor, memory, I/O device, disk control mechanism, computer coupling network adapter, disk requirement processing section connected to a system bus, and a disk connected to a disk control mechanism. The disk requirement processing section controls the disk, in response to a processing requirement for the disk from one of the processors of the other computers, based on structural definition information. The structural definition information describes a structure of the computer system. The computer system may be a loosely-coupled computer system.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: August 10, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Murayama, Hiroshi Yashiro, Satoshi Yoshizawa, Kazuo Horikawa, Takehisa Hayashi, Hiroshi Iwamoto, Kimitoshi Yamada
  • Patent number: 5649102
    Abstract: A distributed shared memory management system for a distributed shared memory computer system having a plurality of computers interconnected by a network, each computer having an independent address space and logically sharing data physically distributed to a storage of each computer. Each computer running a program for reading/changing the shared data includes a coherence control designation command for designating to enter a mutual exclusion state in which two or more computers cannot change the logically single shared data, a coherence control release command for designating a release of the mutual exclusion state, and a coherence control execution command for reflecting the contents of the shared data changed between the coherence control designation command and the coherence control release command, upon the logically single shared data in another computer.
    Type: Grant
    Filed: November 25, 1994
    Date of Patent: July 15, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Masahiko Yamauchi, Satoshi Yoshizawa, Hideki Murayama, Takehisa Hayashi, Akira Kito, Hiroshi Yashiro, Tsutomu Goto, Kimitoshi Yamada, Toru Horimoto
  • Patent number: 5142528
    Abstract: In communication which uses a communication line which allows the determination of a communication protocol in a communication port prior to the communication like in an ISDN network, a communication program corresponding to the determined communication protocol is dynamically linked and initialized to allow dynamic selection of the communication protocol.
    Type: Grant
    Filed: February 2, 1990
    Date of Patent: August 25, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Atsushi Kobayashi, Kimitoshi Yamada, Toru Horimoto
  • Patent number: 4937784
    Abstract: A distributed interactive processing in a complex computer system including a plurality of work stations (IWS's), each having predetermined server processes, at least a host computer (HOST), communication lines interconnecting between the plurality of IWS's and the HOSTs, and communication control portions to establish and to control communication paths between processes to conduct a process-to-process communication between the IWS's and the HOSTs. Each IWS has therein a process to implement an assigned processing request and a request control section to analyze the processing request issued by the own IWS and to determine a server process required to implement the processing request. Among a result of the request analysis, a predetermined server process is executed in the own IWS.
    Type: Grant
    Filed: June 2, 1987
    Date of Patent: June 26, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Masai, Kimitoshi Yamada, Tomihiko Kojima, Ikuo Kimura
  • Patent number: 4914607
    Abstract: In a transfer data screen buffer added to a multi-window display, a command stream for displaying segments to be displayed and superposed over the multi-window display is stored. By the execution of the command stream, the display data developed into a bit map undergoes exclusive OR operation bit by bit with the bit-map developed data of the multi-window data. The operation result is fed back to the display screen bit map memory to be displayed.
    Type: Grant
    Filed: April 8, 1987
    Date of Patent: April 3, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Takanashi, Kimitoshi Yamada
  • Patent number: 4879550
    Abstract: A composite loop communication network formed by combining a plurality of loop communication paths each provided with terminals with one another through a plurality of loop coupling devices so as to form a loop, is disclosed in which one of the terminals of each loop communication path is used as a management terminal, the management terminal of a loop communication path sets routing information on the communication between the loop communication path and a loop communication path adjacent thereto in a loop coupling device, and the loop coupling device selectively takes in data flowing through the former loop communication path, on the basis of the above routing information, to send the data from the loop coupling device to the latter loop communication path, thereby making possible the communication between terminals of different loop communication paths.
    Type: Grant
    Filed: June 9, 1986
    Date of Patent: November 7, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Yusuke Hino, Tohru Horimoto, Hideaki Gemma, Toshiharu Iwata, Kimitoshi Yamada
  • Patent number: 4786897
    Abstract: A display screen control method for a display device capable of supporting a logical screen larger in size than its physical screen is provided. This method enables a desired area to be displayed on the display device by a single operation.According to the method, a first rectangle similar to the logical screen is displayed on the physical screen, a second rectangle similar to the window area which was displayed within a view port in the physical screen is displayed in the first rectangle. The second rectangle is moved to a desired position within the first rectangle by a position indicating means such as a pointing device whereby the area the operator wishes to view is displayed in one quick operation.
    Type: Grant
    Filed: July 24, 1986
    Date of Patent: November 22, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Takanashi, Kimitoshi Yamada
  • Patent number: 4710762
    Abstract: A terminal device having a keyboard and a display device and connected to a central processing unit through a line, wherein a display screen of the display device is divided into a first field and a second field and on-line processing data is displayed in the first field while off-line processing data is simultaneously displayed in the second field so that an operator can operate the keyboard to prepare a document in an off-line mode while the operator refers to the on-line data. The data displayed in the first field is a portion of the on-line processing data stored in a first buffer memory and the data displayed in the second field is a portion of the off-line processing data stored in a second buffer memory. The sizes and the locations of the data read from the respective buffer memories are designated by parameters on a display control table and the parameters are alterable by operation of the keyboard.
    Type: Grant
    Filed: November 22, 1983
    Date of Patent: December 1, 1987
    Assignee: Hitachi, Ltd.
    Inventor: Kimitoshi Yamada