Patents by Inventor Kiyohiko Maeda

Kiyohiko Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150072537
    Abstract: A method of manufacturing a semiconductor device, includes: forming a thin film containing silicon, oxygen and carbon or a thin film containing silicon, oxygen, carbon and nitrogen on a substrate by performing a cycle a predetermined number of times.
    Type: Application
    Filed: March 27, 2014
    Publication date: March 12, 2015
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takaaki NODA, Satoshi SHIMAMOTO, Shingo NOHARA, Yoshiro HIROSE, Kiyohiko MAEDA
  • Patent number: 8679989
    Abstract: A method of manufacturing a semiconductor device has: carrying a substrate into a process chamber; depositing a thin film on the substrate by supplying inside the process chamber a first film deposition gas including at least one element among plural elements forming a thin film to be deposited and capable of accumulating a film solely and a second film deposition gas including at least another element among the plural elements and incapable of accumulating a film solely; carrying the substrate on which is deposited the thin film out from inside the process chamber; and removing a first sediment adhering to an interior of the process chamber and a second sediment adhering to an interior of the supply portion and having a chemical composition different from a chemical composition of the first sediment by supplying cleaning gases inside the process chamber and inside a supply portion that supplies the first film deposition gas while changing at least one of a supply flow rate, a concentration, and a type betwee
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: March 25, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Sadao Nakashima, Takahiro Maeda, Kiyohiko Maeda, Kenji Kameda, Yushin Takasawa
  • Publication number: 20140038429
    Abstract: In a low-temperature, a silicon nitride film having a low in-film chlorine (Cl) content and a high resistance to hydrogen fluoride (HF) is formed. The formation of the silicon nitride film includes (a) supplying a monochlorosilane (SiH3Cl or MCS) gas to a substrate disposed in a processing chamber, (b) supplying a plasma-excited hydrogen-containing gas to the substrate disposed in the processing chamber, (c) supplying a plasma-excited or heat-excited nitrogen-containing gas to the substrate disposed in the processing chamber, (d) supplying at least one of a plasma-excited nitrogen gas and a plasma-excited rare gas to the substrate disposed in the processing chamber, and (e) performing a cycle including the steps (a) through (d) a predetermined number of times to form a silicon nitride film on the substrate.
    Type: Application
    Filed: October 2, 2013
    Publication date: February 6, 2014
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Yoshiro Hirose, Atsushi Sano, Kazuyuki Okuda, Kiyohiko Maeda
  • Publication number: 20130305991
    Abstract: A method of manufacturing a semiconductor device includes conveying a first substrate provided with an opposing surface having insulator regions and a semiconductor region exposed between the insulator regions and a second substrate provided with an insulator surface exposed toward the opposing surface of the first substrate, into a process chamber in a state that the second substrate is arranged in to face the opposing surface of the first substrate, and selectively forming a silicon-containing film with a flat surface at least on the semiconductor region of the opposing surface of the first substrate by heating an inside of the process chamber and supplying at least a silicon-containing gas and a chlorine-containing gas into the process chamber.
    Type: Application
    Filed: July 23, 2013
    Publication date: November 21, 2013
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Kiyohisa Ishibashi, Atsushi Moriya, Takaaki Noda, Kiyohiko Maeda
  • Patent number: 8575042
    Abstract: In a low-temperature, a silicon nitride film having a low in-film chlorine (Cl) content and a high resistance to hydrogen fluoride (HF) is formed. The formation of the silicon nitride film includes (a) supplying a monochlorosilane (SiH3Cl or MCS) gas to a substrate disposed in a processing chamber, (b) supplying a plasma-excited hydrogen-containing gas to the substrate disposed in the processing chamber, (c) supplying a plasma-excited or heat-excited nitrogen-containing gas to the substrate disposed in the processing chamber, (d) supplying at least one of a plasma-excited nitrogen gas and a plasma-excited rare gas to the substrate disposed in the processing chamber, and (e) performing a cycle including the steps (a) through (d) a predetermined number of times to form a silicon nitride film on the substrate.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: November 5, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yosuke Ota, Yoshiro Hirose, Atsushi Sano, Osamu Kasahara, Kazuyuki Okuda, Kiyohiko Maeda
  • Publication number: 20130252437
    Abstract: A method of manufacturing a semiconductor device includes forming a thin film on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a source gas to the substrate, and supplying excited species from each of a plurality of excitation units provided at a side of the substrate to the substrate. Each of the plurality of excitation units generates the excited species by plasma-exciting a reaction gas. In supplying the excited species from each of the plurality of excitation units, an in-plane distribution of the excited species supplied from at least one of the plurality of excitation units in the substrate differs from an in-plane distribution of the excited species supplied from another excitation unit, other than the at least one excitation unit, among the plurality of excitation units, in the substrate.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 26, 2013
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi SANO, Yoshiro HIROSE, Kiyohiko MAEDA, Kazuyuko OKUDA, Ryuji YAMAMOTO
  • Patent number: 8497192
    Abstract: A method of manufacturing a semiconductor device includes conveying a first substrate provided with an opposing surface having insulator regions and a semiconductor region exposed between the insulator regions and a second substrate provided with an insulator surface exposed toward the opposing surface of the first substrate, into a process chamber in a state that the second substrate is arranged in to face the opposing surface of the first substrate, and selectively forming a silicon-containing film with a flat surface at least on the semiconductor region of the opposing surface of the first substrate by heating an inside of the process chamber and supplying at least a silicon-containing gas and a chlorine-containing gas into the process chamber.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: July 30, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kiyohisa Ishibashi, Atsushi Moriya, Takaaki Noda, Kiyohiko Maeda
  • Patent number: 8367530
    Abstract: A substrate processing apparatus, including: a reaction container in which a substrate is processed; a seal cap, brought into contact with one end in an opening side of the reaction container via a first sealing member and a second sealing member so as to seal the opening of the reaction container air-tightly; a first gas channel, formed in a region between the first sealing member and the second sealing member in a state where the seal cap is in contact with the reaction container; a second gas channel, provided to the seal cap and through which the first gas channel is in communication with an inside of the reaction container; a first gas supply port that is provided to the reaction container and supplies a first gas to the first gas channel; and a second gas supply port that is provided to the reaction container and supplies a second gas into the reaction container, wherein a front end opening of the first gas supply port opening to the first gas channel, and a base opening of the second gas channel openin
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: February 5, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kiyohiko Maeda, Takeo Hanashima, Masanao Osanai
  • Patent number: 8304328
    Abstract: To realize a high productivity while maintaining excellent film deposition characteristics on a substrate even if a plurality of processing gases of different gas species are used.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: November 6, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takahiro Maeda, Kiyohiko Maeda, Takashi Ozaki, Akihito Yoshino, Yasunobu Koshi, Yuji Urano
  • Patent number: 8293646
    Abstract: A high quality interface is formed at a low oxygen-carbon density between a substrate and a thin film while preventing heat damage on the substrate and increase of thermal budget. This method includes a step of loading a wafer into a reaction furnace, a step of pretreating the wafer in the reaction furnace, a step of performing a main processing of the pretreated wafer in the reaction furnace, and a step of unloading the wafer from the reaction furnace after the main processing. Hydrogen gas is continuously supplied to the reaction furnace in the period from the end of the pretreating step to the start of the main processing and at least during vacuum-exhausting an interior of the reaction furnace.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: October 23, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Osamu Kasahara, Takaaki Noda, Kiyohiko Maeda, Atsushi Moriya, Minoru Sakamoto
  • Patent number: 8282737
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: October 9, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Publication number: 20120220137
    Abstract: In a low-temperature, a silicon nitride film having a low in-film chlorine (Cl) content and a high resistance to hydrogen fluoride (HF) is formed. The formation of the silicon nitride film includes (a) supplying a monochlorosilane (SiH3Cl or MCS) gas to a substrate disposed in a processing chamber, (b) supplying a plasma-excited hydrogen-containing gas to the substrate disposed in the processing chamber, (c) supplying a plasma-excited or heat-excited nitrogen-containing gas to the substrate disposed in the processing chamber, (d) supplying at least one of a plasma-excited nitrogen gas and a plasma-excited rare gas to the substrate disposed in the processing chamber, and (e) performing a cycle including the steps (a) through (d) a predetermined number of times to form a silicon nitride film on the substrate.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 30, 2012
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yosuke Ota, Yoshiro Hirose, Atsushi Sano, Osamu Kasahara, Kazuyuki Okuda, Kiyohiko Maeda
  • Publication number: 20120064730
    Abstract: Disclosed is a method for manufacturing a semiconductor device which comprises a step for carrying a plurality of substrates (1) in a process chamber (4), a step for supplying an oxygen-containing gas from the upstream side of the substrates (1) carried in the process chamber (4), a step for supplying a hydrogen-containing gas from at least one location corresponding to a position within the region where substrates (1) are placed in the process chamber (4), a step for oxidizing the substrates (1) by reacting the oxygen-containing gas with the hydrogen-containing gas in the process chamber (4), and a step for carrying the thus-processed substrates (1) out of the process chamber (4).
    Type: Application
    Filed: November 21, 2011
    Publication date: March 15, 2012
    Inventors: Takashi OZAKI, Kazuhiro YUASA, Kiyohiko MAEDA
  • Publication number: 20120006268
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Publication number: 20120009764
    Abstract: A method of manufacturing a semiconductor device includes conveying a first substrate provided with an opposing surface having insulator regions and a semiconductor region exposed between the insulator regions and a second substrate provided with an insulator surface exposed toward the opposing surface of the first substrate, into a process chamber in a state that the second substrate is arranged in to face the opposing surface of the first substrate, and selectively forming a silicon-containing film with a flat surface at least on the semiconductor region of the opposing surface of the first substrate by heating an inside of the process chamber and supplying at least a silicon-containing gas and a chlorine-containing gas into the process chamber.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 12, 2012
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Kiyohisa ISHIBASHI, Atsushi MORIYA, Takaaki NODA, Kiyohiko MAEDA
  • Patent number: 8084369
    Abstract: Disclosed is a producing method of a semiconductor device produced by transferring a plurality of substrates into a processing chamber, supplying oxygen-containing gas and hydrogen-containing gas into the processing chamber to process the plurality of substrates by oxidation, and transferring the plurality of the oxidation-processed substrates out from the processing chamber, wherein in the oxidation-processing, the hydrogen-containing gas is supplied from a plurality of locations of a region which is in proximity to the inner wall of the processing chamber and which corresponds to a substrate arrangement region in which the plurality of substrates are arranged in the processing chamber.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: December 27, 2011
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Takashi Ozaki, Kazuhiro Yuasa, Kiyohiko Maeda
  • Patent number: 8057599
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: November 15, 2011
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Patent number: 8043431
    Abstract: A CVD device has a reaction furnace (39) for processing a wafer (1); a seal cap (20) for sealing the reaction furnace (39) hermetically; an isolation flange (42) opposite to the seal cap (20); a small chamber (43) formed by the seal cap (20), the isolation flange (42), and the wall surface in the reaction furnace (39); a feed pipe (19b) for supplying a first gas to the small chamber (43); an outflow passage (42a) provided in the small chamber (43) for allowing the first gas to flow into the reaction furnace (39); and a feed pipe (19a) provided downstream from the outflow passage (42a) for supplying a second gas into the reaction furnace (39). Byproducts such as NH4Cl are prevented from adhering to low temperature sections such as the furnace opening and therefore the semiconductor device production yield is therefore increased.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: October 25, 2011
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Tomoshi Taniyama, Hiroshi Unami, Kiyohiko Maeda, Shinya Morita, Yoshikazu Takashima, Sadao Hisakado
  • Patent number: 7883581
    Abstract: Provided are a substrate processing apparatus and a method of manufacturing a semiconductor device. The substrate processing apparatus includes a reaction vessel configured to process a substrate, a heater configured to heat an inside of the reaction vessel, a gas supply line configured to supply gas into the reaction vessel, a first valve installed at the gas supply line, a flow rate controller installed at the gas supply line, a main exhaust line configured to exhaust the inside of the reaction vessel, a second valve installed at the main exhaust line, a slow exhaust line installed at the main exhaust line, a third valve installed at the slow exhaust line, a throttle part installed at the slow exhaust line, a vacuum pump installed at the main exhaust line, and a controller configured to control the valves and the flow rate controller.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: February 8, 2011
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Naoharu Nakaiso, Kiyohiko Maeda, Masayuki Yamada
  • Patent number: 7879400
    Abstract: There is provided a substrate processing apparatus equipped with a metallic component, with at least a part of its metallic surface exposed to an inside of a processing chamber and subjected to baking treatment at a pressure less than atmospheric pressure. As a result of this baking treatment, a film which does not react with various types of reactive gases, and which can block the out diffusion of metals, is formed on the surface of the above-mentioned metallic component.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: February 1, 2011
    Assignee: Hitachi Kokusal Electric Inc.
    Inventors: Takahiro Maeda, Kiyohiko Maeda, Takashi Ozaki