Abstract: A method for forming a semiconductor device includes providing a semiconductor body which has a main surface and a first n-type semiconductor region, forming a trench which extends from the main surface into the first n-type semiconductor region, and forming a dielectric layer having fixed negative charges on a surface of the trench, by performing at least one atomic layer deposition using an organometallic precursor.

Abstract: Embodiments relate to MEMS devices, particularly MEMS devices integrated with related electrical devices on a single wafer. Embodiments utilize a modular process flow concept as part of a MEMS-first approach, enabling use of a novel cavity sealing process. The impact and potential detrimental effects on the electrical devices by the MEMS processing are thereby reduced or eliminated. At the same time, a highly flexible solution is provided that enables implementation of a variety of measurement principles, including capacitive and piezoresistive. A variety of sensor applications can therefore be addressed with improved performance and quality while remaining cost-effective.

Abstract: Embodiments relate to xMR sensors having very high shape anisotropy. Embodiments also relate to novel structuring processes of xMR stacks to achieve very high shape anisotropies without chemically affecting the performance relevant magnetic field sensitive layer system while also providing comparatively uniform structure widths over a wafer, down to about 100 nm in embodiments. Embodiments can also provide xMR stacks having side walls of the performance relevant free layer system that are smooth and/or of a defined lateral geometry which is important for achieving a homogeneous magnetic behavior over the wafer.

Abstract: Embodiments relate to xMR sensors, in particular AMR and/or TMR angle sensors with an angle range of 360 degrees. In embodiments, AMR angle sensors with a range of 360 degrees combine conventional, highly accurate AMR angle structures with structures in which an AMR layer is continuously magnetically biased by an exchange bias coupling effect. The equivalent bias field is lower than the external rotating magnetic field and is applied continuously to separate sensor structures. Thus, in contrast with conventional solutions, no temporary, auxiliary magnetic field need be generated, and embodiments are suitable for magnetic fields up to about 100 mT or more. Additional embodiments relate to combined TMR and AMR structures. In such embodiments, a TMR stack with a free layer functioning as an AMR structure is used. With a single such stack, contacted in different modes, a high-precision angle sensor with 360 degrees of uniqueness can be realized.

Abstract: In various embodiments, a method for processing a carrier is provided. The method for processing a carrier may include: forming a first catalytic metal layer over a carrier; forming a source layer over the first catalytic metal layer; forming a second catalytic metal layer over the source layer, wherein the thickness of the second catalytic metal layer is larger than the thickness of the first catalytic metal layer; and subsequently performing an anneal to enable diffusion of the material of the source layer forming an interface layer adjacent to the surface of the carrier from the diffused material of the source layer.

Abstract: Methods, apparatuses and devices related to the manufacturing of compensation devices are provided. In some cases, an n/p-codoped layer is deposited for calibration purposes to minimize a net doping concentration. In other cases, alternatingly n- and p-doped layers are then deposited. In other embodiments, an n/p-codoped layer is deposited in a trench where n- and p-dopants have different diffusion behavior. To obtain different doping profiles, a heat treatment may be performed.

Abstract: Embodiments relate to xMR sensors, in particular AMR and/or TMR angle sensors with an angle range of 360 degrees. In embodiments, AMR angle sensors with a range of 360 degrees combine conventional, highly accurate AMR angle structures with structures in which an AMR layer is continuously magnetically biased by an exchange bias coupling effect. The equivalent bias field is lower than the external rotating magnetic field and is applied continuously to separate sensor structures. Thus, in contrast with conventional solutions, no temporary, auxiliary magnetic field need be generated, and embodiments are suitable for magnetic fields up to about 100 mT or more. Additional embodiments relate to combined TMR and AMR structures. In such embodiments, a TMR stack with a free layer functioning as an AMR structure is used. With a single such stack, contacted in different modes, a high-precision angle sensor with 360 degrees of uniqueness can be realized.

Abstract: Embodiments related to a method of manufacturing of an imager and an imager device are shown and depicted.

Abstract: Embodiments relate to MEMS devices, particularly MEMS devices integrated with related electrical devices on a single wafer. Embodiments utilize a modular process flow concept as part of a MEMS-first approach, enabling use of a novel cavity sealing process. The impact and potential detrimental effects on the electrical devices by the MEMS processing are thereby reduced or eliminated. At the same time, a highly flexible solution is provided that enables implementation of a variety of measurement principles, including capacitive and piezoresistive. A variety of sensor applications can therefore be addressed with improved performance and quality while remaining cost-effective.

Abstract: A method for forming a semiconductor device includes providing a semiconductor body which has a main surface and a first n-type semiconductor region, forming a trench which extends from the main surface into the first n-type semiconductor region, and forming a dielectric layer having fixed negative charges on a surface of the trench, by performing at least one atomic layer deposition using an organometallic precursor.

Abstract: A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.

Abstract: A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.

Abstract: In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seamless ferromagnetic material surrounding at least a first portion of the conductor.

Abstract: In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seamless ferromagnetic material surrounding at least a first portion of the conductor.

Abstract: Embodiments relate to magnetoresistive (MR) sensors, sensor elements and structures, and methods. In particular, embodiments relate to MR, such as giant MR (GMR) or tunneling MR (TMR), spin valve layer systems and related sensors having improved stability. Embodiments include at least one of a multi-layer pinned layer or a multi-layer reference layer, making the stack more stable and therefore suitable for use at higher temperatures and magnetic fields than conventional systems and sensors.

Abstract: Embodiments relate to xMR sensors, in particular AMR and/or TMR angle sensors with an angle range of 360 degrees. In embodiments, AMR angle sensors with a range of 360 degrees combine conventional, highly accurate AMR angle structures with structures in which an AMR layer is continuously magnetically biased by an exchange bias coupling effect. The equivalent bias field is lower than the external rotating magnetic field and is applied continuously to separate sensor structures. Thus, in contrast with conventional solutions, no temporary, auxiliary magnetic field need be generated, and embodiments are suitable for magnetic fields up to about 100 mT or more. Additional embodiments relate to combined TMR and AMR structures. In such embodiments, a TMR stack with a free layer functioning as an AMR structure is used. With a single such stack, contacted in different modes, a high-precision angle sensor with 360 degrees of uniqueness can be realized.

Abstract: A power semiconductor device has a semiconductor body which includes an active area and a peripheral area which both define a horizontal main surface of the semiconductor body. The semiconductor body further includes an n-type semiconductor layer, a pn junction and at least one trench. The n-type semiconductor layer is embedded in the semiconductor body and extends to the main surface in the peripheral area. The pn junction is arranged between the n-type semiconductor layer and the main surface in the active area. The at least one trench extends in the peripheral area from the main surface into the n-type semiconductor layer and includes a dielectric layer with fixed negative charges. In the vertical direction, the dielectric layer is arranged both below and above the pn junction. The dielectric layer with fixed negative charges typically has a negative net charge. Further, a method for forming a semiconductor device is provided.

Abstract: Embodiments relate to MEMS devices, particularly MEMS devices integrated with related electrical devices on a single wafer. Embodiments utilize a modular process flow concept as part of a MEMS-first approach, enabling use of a novel cavity sealing process. The impact and potential detrimental effects on the electrical devices by the MEMS processing are thereby reduced or eliminated. At the same time, a highly flexible solution is provided that enables implementation of a variety of measurement principles, including capacitive and piezoresistive. A variety of sensor applications can therefore be addressed with improved performance and quality while remaining cost-effective.

Abstract: Embodiments relate to xMR sensors having very high shape anisotropy. Embodiments also relate to novel structuring processes of xMR stacks to achieve very high shape anisotropies without chemically affecting the performance relevant magnetic field sensitive layer system while also providing comparatively uniform structure widths over a wafer, down to about 100 nm in embodiments. Embodiments can also provide xMR stacks having side walls of the performance relevant free layer system that are smooth and/or of a defined lateral geometry which is important for achieving a homogeneous magnetic behavior over the wafer.

Abstract: In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seemless ferromagnetic material surrounding at least a first portion of the conductor.