Patents by Inventor Kohei Sasaki
Kohei Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11959250Abstract: A first operation mechanism 3 includes a first driving source 30 which generates a driving force based on a drive command and a first driving mechanism 32 which inclines a left-side traveling pedal 1c by the driving force from the first driving source 30. The first driving mechanism 32 has a first abutting portion 32a which abuts a pedal surface of the left-side traveling pedal 1c and a first driving unit 32b which inclines the left-side traveling pedal 1c by inclining the first abutting portion. The first driving unit 32b is arranged in a position shifted to a lateral side from a space in which the first abutting portion 32a moves.Type: GrantFiled: February 6, 2020Date of Patent: April 16, 2024Assignees: Kobelco Construction Machinery Co., Ltd., Asahi Intecc Co., Ltd.Inventors: Hitoshi Sasaki, Seiji Saiki, Yoichiro Yamazaki, Kohei Nakamizo
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Publication number: 20240120573Abstract: There is provided a cooling structure between battery cells which allows a temperature rise of adjacent battery cells to be restrained more efficiently even for an appearance of an abnormally heat-generating battery cell. A cooling structure between battery cells disposed side by side so that two side surfaces face each other, the cooling structure between the battery cells includes, formed of plate-shaped metal members each having a thermal conductivity of 100 W/m·K or more and a thickness of 0.3 mm or more, and being in contact with the respective facing side surfaces of the adjacent battery cells, and a heat insulating layer disposed between the plate-shaped metal members, and having a thermal conductivity of 1.0 W/m·K or less and a thickness of 0.Type: ApplicationFiled: March 31, 2022Publication date: April 11, 2024Applicant: NIPPON STEEL CORPORATIONInventors: Kohei SASAKI, Masaharu IBARAGI, Masafumi USUI, Tatsunori SUNAGAWA
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Patent number: 11922389Abstract: A payment terminal includes a camera configured to capture an image, a card slot for inserting a contact type IC card, and a panel arrangement surface on which a touch panel is arranged. A lens of the camera, the card slot, and the panel arrangement surface are arranged in order in the height direction from a placement surface of the payment terminal. The panel arrangement surface is oriented obliquely upward toward a user positioned in front of the card slot. An optical axis direction of the lens is obliquely upward toward the user, and the lens is provided closer to the user than the card slot.Type: GrantFiled: September 3, 2021Date of Patent: March 5, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kyohei Kida, Yasuyuki Tanaka, Yasuji Wakiyama, Takeyuki Sasaki, Kohei Takada
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Patent number: 11923464Abstract: A Schottky barrier diode includes a semiconductor layer including a Ga2O3-based single crystal, an anode electrode that forms a Schottky junction with the semiconductor layer and is configured so that a portion in contact with the semiconductor layer includes Mo or W, and a cathode electrode. A turn-on voltage thereof is not less than 0.3 V and not more than 0.5 V.Type: GrantFiled: June 12, 2018Date of Patent: March 5, 2024Assignees: Tamura Corporation, Novel Crystal Technology, Inc.Inventors: Kohei Sasaki, Daiki Wakimoto, Yuki Koishikawa, Quang Tu Thieu
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Publication number: 20240069458Abstract: A developer set includes a first developer and a second developer. The first developer contains a first toner containing first toner particles and a first carrier containing first carrier particles. The second developer contains a second toner containing second toner particles and a second carrier containing second carrier particles. The first toner particles and the second toner particles each include a toner mother particle and external additive particles attached to the surface of the toner mother particle. The external additive particles include spacer particles. The spacer particles have a number average primary particle diameter of at least 32 nm and no greater than 145 nm. The first carrier particles each include a first carrier mother particle and strontium titanate particles attached to the surface of the first carrier mother particle.Type: ApplicationFiled: August 30, 2023Publication date: February 29, 2024Applicant: KYOCERA Document Solutions Inc.Inventors: Asami SASAKI, Norio KUBO, Masashi FUJISHIMA, Kohei TERASAKI
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Publication number: 20230197844Abstract: A field-effect transistor includes an n-type semiconductor layer that includes a Ga2O3-based single crystal and a plurality of trenches opening on one surface, a gate electrode buried in each of the plurality of trenches, a source electrode connected to a mesa-shaped region between adjacent trenches in the n-type semiconductor layer, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on an opposite side to the source electrode.Type: ApplicationFiled: February 8, 2023Publication date: June 22, 2023Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc.Inventor: Kohei SASAKI
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Publication number: 20230183591Abstract: A lubricating oil composition for an internal combustion engine includes: (A) a lubricating base oil including at least one mineral oil-based base oil and having a kinematic viscosity at 100° C. of from 2.0 mm2/s or more and 4.3 mm2/s or less, and (B) a calcium borate-containing metallic detergent in an mount of 500 mass ppm or more and less than 1500 mass ppm in terms of calcium, based on a total amount of the composition. The composition has an evaporation loss by NOACK method (250° C., 1 h) of from 10 mass % or more and 40 mass % or less, and the composition has a viscosity index of from 140 or more and 350 or less. The lubricating oil composition is provided, wherein even in the case of using a highly evaporative base oil to make the viscosity low, the friction characteristic of the lubricating oil composition can be kept low.Type: ApplicationFiled: June 21, 2022Publication date: June 15, 2023Applicant: ENEOS CORPORATIONInventors: Kohei SASAKI, Hideo TSUNEOKA, Kotaro WADA
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Patent number: 11626522Abstract: A Schottky barrier diode includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode brought into Schottky contact with the drift layer, and a cathode electrode brought into ohmic contact with the semiconductor substrate. The drift layer has a plurality of trenches formed in a position overlapping the anode electrode in a plan view. Among the plurality of trenches, a trench positioned at the end portion has a selectively increased width. Thus, the curvature radius of the bottom portion of the trench is increased, or an edge part constituted by the bottom portion as viewed in a cross section is divided into two parts. As a result, an electric field to be applied to the bottom portion of the trench positioned at the end portion is mitigated, making dielectric breakdown less likely to occur.Type: GrantFiled: September 26, 2018Date of Patent: April 11, 2023Assignees: TDK CORPORATION, TAMURA CORPORATION, NOVEL CRYSTAL TECHNOLOGY, INC.Inventors: Jun Arima, Jun Hirabayashi, Minoru Fujita, Kohei Sasaki
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Patent number: 11621357Abstract: An object of the present invention is to provide a Schottky barrier diode less liable to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode according to this disclosure includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode 40 brought into Schottky contact with the drift layer, a cathode electrode brought into ohmic contact with the semiconductor substrate, an insulating layer provided on the drift layer so as to surround the anode electrode in a plan view, and a semiconductor layer provided on a surface of a part of the drift layer that is positioned between the anode electrode and the insulating layer and on the insulating layer. The semiconductor layer has a conductivity type opposite to that of the drift layer.Type: GrantFiled: October 9, 2019Date of Patent: April 4, 2023Assignees: TDK CORPORATION, TAMURA CORPORATION, NOVEL CRYSTAL TECHNOLOGY, INC.Inventors: Jun Arima, Minoru Fujita, Jun Hirabayashi, Kohei Sasaki
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Patent number: 11616138Abstract: A field-effect transistor includes an n-type semiconductor layer that includes a Ga2O3-based single crystal and a plurality of trenches opening on one surface, a gate electrode buried in each of the plurality of trenches, a source electrode connected to a mesa-shaped region between adjacent trenches in the n-type semiconductor layer, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on an opposite side to the source electrode.Type: GrantFiled: September 26, 2018Date of Patent: March 28, 2023Assignees: Tamura Corporation, Novel Crystal Technology, Inc.Inventor: Kohei Sasaki
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Publication number: 20230043402Abstract: A trench-type MESFET includes an n-type semiconductor layer including a Ga2O3-based single crystal and including plural trenches opening on one surface, first insulators respectively buried in bottom portions of the plural trenches, gate electrodes respectively buried in the plural trenches so as to be placed on the first insulators and so that side surfaces thereof are in contact with the n-type semiconductor layer, a source electrode connected to a mesa-shaped portion between the adjacent trenches of the n-type semiconductor layer, second insulators respectively buried in the plural trenches so as to be placed on the gate electrodes to insulate the gate electrodes and the source electrode, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on a side opposite to the source electrode.Type: ApplicationFiled: December 15, 2020Publication date: February 9, 2023Applicant: Novel Crystal Technology, Inc.Inventor: Kohei SASAKI
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Publication number: 20230034806Abstract: A semiconductor device includes a lead frame including a raised portion on a surface, and a semiconductor element that is face-down mounted on the lead frame and includes a substrate including a Ga2O3-based semiconductor, an epitaxial layer including a Ga2O3-based semiconductor and stacked on the substrate, a first electrode connected to a surface of the substrate on an opposite side to the epitaxial layer, and a second electrode connected to a surface of the epitaxial layer on an opposite side to the substrate and including a field plate portion at an outer peripheral portion. The semiconductor element is fixed onto the raised portion. An outer peripheral portion of the epitaxial layer, which is located on the outer side of the field plate portion, is located directly above a flat portion of the lead frame that is a portion at which the raised portion is not provided.Type: ApplicationFiled: December 21, 2020Publication date: February 2, 2023Applicants: TAMURA CORPORATION, Novel Crystal Technology, Inc.Inventors: Nobuo MACHIDA, Kohei SASAKI
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Patent number: 11563092Abstract: A Ga2O3-based semiconductor device includes a Ga2O3-based crystal layer including a donor, and an N-doped region formed in at least a part of the Ga2O3-based crystal layer.Type: GrantFiled: April 26, 2018Date of Patent: January 24, 2023Assignees: National Institute of Information and Communications Technology, Tamura Corporation, Novel Crystal Technology, IncInventors: Masataka Higashiwaki, Yoshiaki Nakata, Takafumi Kamimura, Man Hoi Wong, Kohei Sasaki, Daiki Wakimoto
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Patent number: 11557681Abstract: An object of the present invention is to provide a Schottky barrier diode less liable to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode according to this disclosure includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode brought into Schottky contact with the drift layer, and a cathode electrode brought into ohmic contact with the semiconductor substrate. The drift layer has an outer peripheral trench surrounding the anode electrode in a plan view. The surface of the drift layer positioned between the anode electrode and the outer peripheral trench is covered with a semiconductor layer having a conductivity type opposite to that of the drift layer.Type: GrantFiled: October 9, 2019Date of Patent: January 17, 2023Assignees: TDK CORPORATION, TAMURA CORPORATION, NOVEL CRYSTAL TECHNOLOGY, INC.Inventors: Jun Arima, Minoru Fujita, Jun Hirabayashi, Kohei Sasaki
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Patent number: 11469334Abstract: An object of the present invention is to provide a Schottky barrier diode less apt to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode includes a semiconductor substrate 20 made of gallium oxide, a drift layer 30 made of gallium oxide and provided on the semiconductor substrate 20, an anode electrode 40 brought into Schottky contact with the drift layer 30, and a cathode electrode 50 brought into ohmic contact with the semiconductor substrate 20. The drift layer 30 has an outer peripheral trench 10 that surrounds the anode electrode 40 in a plan view, and the outer peripheral trench 10 is filled with a semiconductor material 11 having a conductivity type opposite to that of the drift layer 30. An electric field is dispersed by the presence of the thus configured outer peripheral trench 10. This alleviates electric field concentration on the corner of the anode electrode 40, making it less apt to cause dielectric breakdown.Type: GrantFiled: March 11, 2019Date of Patent: October 11, 2022Assignees: TDK CORPORATION, TAMURA CORPORATION, NOVEL CRYSTAL TECHNOLOGY, INC.Inventors: Jun Arima, Minoru Fujita, Jun Hirabayashi, Kohei Sasaki
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Patent number: 11456388Abstract: A trench MOS Schottky diode includes a first semiconductor layer including a Ga2O3-based single crystal, a second semiconductor layer that is a layer stacked on the first semiconductor layer, includes a Ga2O3-based single crystal, and includes a trench opened on a surface thereof opposite to the first semiconductor layer, an anode electrode formed on the surface of the second semiconductor layer, a cathode electrode formed on a surface of the first semiconductor layer, an insulating film covering the inner surface of the trench of the second semiconductor layer, and a trench electrode that is buried in the trench of the second semiconductor layer so as to be covered with the insulating film and is in contact with the anode electrode. The second semiconductor layer includes an insulating dry-etching-damaged layer with a thickness of not more than 0.8 ?m in a region including the inner surface of the trench.Type: GrantFiled: February 25, 2019Date of Patent: September 27, 2022Assignees: Tamura Corporation, Novel Crystal Technology, Inc., TDK CorporationInventors: Kohei Sasaki, Minoru Fujita, Jun Hirabayashi, Jun Arima
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Patent number: 11355594Abstract: A diode includes an n-type semiconductor layer including an n-type Ga2O3-based single crystal, and a p-type semiconductor layer including a p-type semiconductor in which a volume of an amorphous portion is higher than a volume of a crystalline portion. The n-type semiconductor layer and the p-type semiconductor layer form a pn junction.Type: GrantFiled: July 23, 2018Date of Patent: June 7, 2022Assignees: Tamura Corporation, Novel Crystal Technology, Inc.Inventor: Kohei Sasaki
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Patent number: 11264241Abstract: A semiconductor substrate includes a single crystal Ga2O3-based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal Ga2O3-based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga2O3-based substrate.Type: GrantFiled: July 9, 2018Date of Patent: March 1, 2022Assignees: TAMURA CORPORATION, SICOXS Corporation, National Institute of Information and Commnications TechnologyInventors: Akito Kuramata, Shinya Watanabe, Kohei Sasaki, Kuniaki Yagi, Naoki Hatta, Masataka Higashiwaki, Keita Konishi
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Publication number: 20210404086Abstract: As one embodiment, the present invention provides a method for growing a ?-Ga2O3-based single crystal film by using HYPE method. The method includes a step of exposing a Ga2O3-based substrate to a gallium chloride-based gas and an oxygen-including gas, and growing a ?-Ga2O3-based single crystal film on a principal surface of the Ga2O3-based substrate at a growth temperature of not lower than 900° C.Type: ApplicationFiled: September 10, 2021Publication date: December 30, 2021Applicants: TAMURA CORPORATION, NATIONAL UNIVERSITY CORPORATION TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGYInventors: Ken GOTO, Kohei SASAKI, Akinori KOUKITU, Yoshinao KUMAGAI, Hisashi MURAKAMI
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Publication number: 20210343880Abstract: An object of the present invention is to provide a Schottky barrier diode less liable to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode according to this disclosure includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode 40 brought into Schottky contact with the drift layer, a cathode electrode brought into ohmic contact with the semiconductor substrate, an insulating layer provided on the drift layer so as to surround the anode electrode in a plan view, and a semiconductor layer provided on a surface of a part of the drift layer that is positioned between the anode electrode and the insulating layer and on the insulating layer. The semiconductor layer has a conductivity type opposite to that of the drift layer.Type: ApplicationFiled: October 9, 2019Publication date: November 4, 2021Inventors: Jun ARIMA, Minoru FUJITA, Jun HIRABAYASHI, Kohei SASAKI