Patent number: 8816318
Abstract: A nonvolatile memory device includes a first and second conductive unit and a memory layer. The memory layer is provided between the first conductive unit and the second conductive unit. The memory layer includes a material expressed by (M11?uM2u)xX+y?+z? (M1 and M2 include at least one selected from the group consisting of Mg, Al, Sc, Y, Ga, Ti, Zr, Hf, Si, Ge, Sn, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Nb, Ta, Mo, W, Ru, Rh, Ca, Sr, Ba, and Ln (a lanthanoid element), X includes at least one of O and N, ? includes at least one of Li, Na, K, Rb, Cs, and Fr, ? includes at least one of F, Cl, Br, and I, 0.1?x?1.1, 0.0001?y?0.2, 0.9?y/z?1.1).
Type:
Grant
Filed:
February 27, 2013
Date of Patent:
August 26, 2014
Assignee:
Kabushiki Kaisha Toshiba
Inventor:
Koichi Kubo
Publication number: 20130248807
Abstract: A nonvolatile memory device includes a first and second conductive unit and a memory layer. The memory layer is provided between the first conductive unit and the second conductive unit. The memory layer includes a material expressed by (M11?uM2u)xX+y?+z? (M1 and M2 include at least one selected from the group consisting of Mg, Al, Sc, Y, Ga, Ti, Zr, Hf, Si, Ge, Sn, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Nb, Ta, Mo, W, Ru, Rh, Ca, Sr, Ba, and Ln (a lanthanoid element), X includes at least one of O and N, ? includes at least one of Li, Na, K, Rb, Cs, and Fr, ? includes at least one of F, Cl, Br, and I, 0.1?x?1.1, 0.0001?y?0.2, 0.9?y/z?1.1).
Type:
Application
Filed:
February 27, 2013
Publication date:
September 26, 2013
Applicant:
KABUSHIKI KAISHA TOSHIBA
Inventor:
Koichi KUBO