Abstract: A signal transmission device having a capacitor coupler includes a semiconductor substrate, a low voltage circuit region, an insulating film formed on the semiconductor substrate, a lower electrode formed on the semiconductor substrate via the insulating film, and an upper electrode disposed opposite to the lower electrode via the insulating film interposed therebetween. A shield portion includes a conductor to which a low voltage is applied is provided between the lower electrode and the upper electrode and the low voltage circuit region. When a stacking direction of the lower electrode and the upper electrode is defined as a height direction, the shield portion is located higher than the low voltage circuit region and has an eaves part extending on an opposite side with respect to the lower electrode and the upper electrode.

Abstract: An electronic component that includes: a base body having an outer surface defining a recess with an inner surface, wherein, when the recess is viewed in a direction orthogonal to the outer surface, at least a part of an outer edge of the recess is curved, and when the recess is viewed in a section orthogonal to the outer surface, at least a part of the inner surface of the recess is curved; a wiring inside the base body; and a glass film covering the outer surface of the base body and not covering the inner surface of the recess.

Abstract: An electronic component includes a ceramic body, and an external electrode on the ceramic body, the external electrode includes a base layer continuously covering an end surface of the ceramic body and a portion of a side surface bordering the end surface, and a plating layer covering the base layer, the ceramic body includes a recess open on the side surface, an opening of the recess includes a pair of edges, one edge of the opening is located within a covered region on the side surface covered with the base layer, and the other edge of the opening is spaced away from the covered region.

Abstract: A carbon material for a non-aqueous secondary battery containing a graphite capable of occluding and releasing lithium ions, and having a cumulative pore volume at pore diameters in a range of 0.01 ?m to 1 ?m of 0.08 mL/g or more, a roundness, as determined by flow-type particle image analysis, of 0.88 or greater, and a pore diameter to particle diameter ratio (PD/d50 (%)) of 1.8 or less, the ratio being given by equation (1A): PD/d50 (%)=mode pore diameter (PD) in a pore diameter range of 0.01 ?m to 1 ?m in a pore distribution determined by mercury intrusion/volume-based average particle diameter (d50)×100 is provided.

Abstract: A method for managing electronic components includes a manufacturer-side process including preparing bulk cases provided with RFID tags storing unique IDs and including electronic components stored therein, storing manufacturer-side information in association with the unique IDs in a manufacturer-side-information storage area on a cloud, and shipping the electronic components on a per-bulk case basis, receiving the shipped bulk cases, reading the unique IDs stored in the RFID tags, and obtaining, based on the read unique IDs, the manufacturer-side information stored in the manufacturer-side-information storage area in the cloud.

Abstract: An electronic component that includes: an element body; and an insulating film covering an outer surface of the element body. The insulating film has a mix layer and a glass layer. The mix layer has a first glass and powder particles. The glass layer contains a second glass and has a smaller content percentage of the powder particles than the mix layer. The mix layer is on a side of the insulating film closer to the element body when viewed from the glass layer.

Abstract: An electronic component that includes: an element body; and an insulating film covering an outer surface of the element body. The element body has a crack that opens to the outer surface. In a cross section orthogonal to the outer surface, the crack has a first portion that extends from the opening and intersects an axis orthogonal to the outer surface. In addition, one portion of the insulating film penetrates into at least an inner space of the first portion of the crack.

Abstract: An electronic component that includes: a base body; and an insulating film covering an outer surface of the base body. The insulating film includes the film main body and a plurality of the thick film portions. A material of the film main body includes a glass. A material of the thick film portion is the same as the glass of the film main body. A thickness of the thick film portion is larger than an average thickness of the film main body.

Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.

Abstract: At least an electrode of a first electrode group and at least an electrode of a second electrode group are formed in a region nearer to one edge portion of a substrate than to a center of the substrate in a longer-side direction of the substrate, and the electrode that is nearest to the second electrode group in the longer-side direction among the first electrode group formed in the region nearer to the one edge portion and the second electrode group are provided with a space between the electrode and the second electrode group.

Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.

Abstract: Provided is an image heating apparatus comprising: a first rotating member; a second rotating member that forms a nip with the first rotating member so as to nip the recording material therebetween; a heater that heats the nip; a conductive sheet member that is disposed so as to overlap with a part of the heater; and a restricting member that restricts relative positions between the sheet member and the heater. The restricting member is configured so as to restrict a relative movement between the sheet member and the heater in a first direction, which is a direction where the sheet member overlaps with a part of the heater, and to allow the relative movement in a second direction which is perpendicular to the first direction. A reinforcing land, that joins the heater and the sheet member, is disposed in a position that is electrically isolated.

Abstract: A disclosed example apparatus includes memory; and processor circuitry to: identify a lock-protected section of instructions in the memory; replace lock/unlock instructions with transactional lock acquire and transactional lock release instructions to form a transactional process; and execute the transactional process in a speculative execution.

Abstract: Provided is an image heating apparatus comprising: a first rotating member; a second rotating member that forms a nip with the first rotating member so as to nip the recording material therebetween; a heater that heats the nip; a conductive sheet member that is disposed so as to overlap with a part of the heater; and a restricting member that restricts relative positions between the sheet member and the heater. The restricting member is configured so as to restrict a relative movement between the sheet member and the heater in a first direction, which is a direction where the sheet member overlaps with a part of the heater, and to allow the relative movement in a second direction which is perpendicular to the first direction. A reinforcing land, that joins the heater and the sheet member, is disposed in a position that is electrically isolated.

Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.

Abstract: A control device (10) includes a spreadsheet process additional starting-up unit (162) and a spreadsheet process holding unit (163) configured to newly start up the spreadsheet software when the spreadsheet software has not been started up, and when the spreadsheet software has been started up configured to start up second spreadsheet software when spreadsheet software having been started up has been held such that the spreadsheet software is not terminated, a data entry unit (168) configured to enter information acquired by accessing to an information acquisition source in an information entry portion of a calculation sheet of the spreadsheet software, the calculation sheet being a calculation sheet in which a business logic is set for inter-cell computation on the calculation sheet, and a result acquisition unit (169) configured to acquire a determination result on the calculation sheet when a determination result for the information entered in the information entry portion is shown by the business logic re

Abstract: A combination of hardware monitoring and binary translation software allow detection of return-oriented programming (ROP) exploits with low overhead and low false positive rates. Embodiments may use various forms of hardware to detect ROP exploits and indicate the presence of an anomaly to a device driver, which may collect data and pass the indication of the anomaly to the binary translation software to instrument the application code and determine whether an ROP exploit has been detected. Upon detection of the ROP exploit, the binary translation software may indicate the ROP exploit to an anti-malware software, which may take further remedial action as desired.

Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.

Abstract: A disclosed example includes generating a binary translation of a native code section in response to a determination that the binary translation of the native code section is not present in a translation cache; storing the binary translation of the native code section in the translation cache; determining that a stop has occurred during the generation of the binary translation; subsequent to the determination that the stop has occurred, generating a binary translation state map of at least a portion of the binary translation; storing, for at least a portion of a duration of the stop, the binary translation state map in memory; and discarding the binary translation state map from the memory upon termination of the stop, the binary translation state map to not exist after the discard of the binary translation state map.

Abstract: The present disclosure is directed to a system for on-demand binary translation state map generation. Instead of interpreting the native code to be executed, binary translation circuitry (BT circuitry) may execute a binary translation (BT) in place of the native code. When a stop occurs (e.g., due to an interrupt, a modification of the native code, etc.), the BT circuitry may generate a binary translation state map (BT state map) that allows the location of the stop to be mapped back to the native code. Generation of the BT state map may involve determining a location and offset for the stop, performing region formation based on the location, loading instructions from the region (e.g., while accounting for the need to emulate instructions), forming the BT state map based at least on the size of the loaded instructions, and then mapping the stop back to the native code utilizing the offset.