Abstract: The present invention is a semiconductor module including: first and second drive circuits that perform drive control of at least one pair of first and second switching devices, in which the at least one pair of first and second switching devices and the first and second drive circuits are sealed in a package having a rectangular shape in plan view, and there are provided: a control terminal provided to protrude from a side surface of a first long side out of first and second long sides of the package, and to which a control signal of the first and second drive circuits is inputted; an output terminal provided to protrude from a side surface of the second long side; a first main terminal provided to protrude from a side surface of a first short side out of first and second short sides of the package; and a second main terminal provided to protrude from a side surface of the second short side.

Abstract: A semiconductor module includes: a control circuit for controlling first and second transistors operating complementarily; and an internal controller receiving a data signal including a set value of an operating characteristic from an external controller to store the data signal in a memory and then transferring the set value of the operating characteristic to the control circuit. The data signal is sent to the internal controller in the order of the set value of the operating characteristic and a specific trigger value. The internal controller transfers the set value of the operating characteristic to the control circuit in timed relation to writing of the specific trigger value into the memory. The control circuit includes first and second drivers. The control circuit changes settings of the first and second drivers to thereby change the operating characteristic of the semiconductor module.

Abstract: A semiconductor module includes: a control circuit for controlling first and second transistors operating complementarily; and an internal controller receiving a data signal including a set value of an operating characteristic from an external controller to store the data signal in a memory and then transferring the set value of the operating characteristic to the control circuit. The data signal is sent to the internal controller in the order of the set value of the operating characteristic and a specific trigger value. The internal controller transfers the set value of the operating characteristic to the control circuit in timed relation to writing of the specific trigger value into the memory. The control circuit includes first and second drivers. The control circuit changes settings of the first and second drivers to thereby change the operating characteristic of the semiconductor module.

Abstract: A driving device for a semiconductor element includes: a plurality of detection circuits that detect different types of abnormalities of the semiconductor element; a logic circuit that generates an error signal when at least one of the detection circuits detects an abnormality; an alarm signal generating circuit that receives the error signal and generates an alarm signal made of one or a plurality of pulses, the alarm signal having a different pulse width for each of the detection circuits that has detected an abnormality; and a protection operation determining circuit that determines whether or not a protection function of the semiconductor element is operating based on the error signal and the alarm signal, and shuts off input of a drive signal to the semiconductor element when it is determined that the protection function is operating.

Abstract: The present invention is a semiconductor module including: first and second drive circuits that perform drive control of at least one pair of first and second switching devices, in which the at least one pair of first and second switching devices and the first and second drive circuits are sealed in a package having a rectangular shape in plan view, and there are provided: a control terminal provided to protrude from a side surface of a first long side out of first and second long sides of the package, and to which a control signal of the first and second drive circuits is inputted; an output terminal provided to protrude from a side surface of the second long side; a first main terminal provided to protrude from a side surface of a first short side out of first and second short sides of the package; and a second main terminal provided to protrude from a side surface of the second short side.

Abstract: An external detection terminal CIN1 is externally connectable outside a package and accepts a voltage signal proportionate to magnitude of a current in a second fixed-potential terminal. A first comparator circuit determines whether magnitude of the current in the second fixed-potential terminal indicated by the voltage signal from the external detection terminal is within a permissible range or beyond the permissible range. A second comparator circuit determines whether magnitude of a current in a sense terminal detected by using an internal detection terminal is within a permissible range or beyond the permissible range. A driving signal generator is prohibited from generating an ON signal as a driving signal if at least one of the first comparator circuit and the second comparator circuit determines that the current magnitude is beyond the permissible range.

Abstract: An external detection terminal CIN1 is externally connectable outside a package and accepts a voltage signal proportionate to magnitude of a current in a second fixed-potential terminal. A first comparator circuit determines whether magnitude of the current in the second fixed-potential terminal indicated by the voltage signal from the external detection terminal is within a permissible range or beyond the permissible range. A second comparator circuit determines whether magnitude of a current in a sense terminal detected by using an internal detection terminal is within a permissible range or beyond the permissible range. A driving signal generator is prohibited from generating an ON signal as a driving signal if at least one of the first comparator circuit and the second comparator circuit determines that the current magnitude is beyond the permissible range.

Abstract: A driving device for a semiconductor element includes: a plurality of detection circuits that detect different types of abnormalities of the semiconductor element; a logic circuit that generates an error signal when at least one of the detection circuits detects an abnormality; an alarm signal generating circuit that receives the error signal and generates an alarm signal made of one or a plurality of pulses, the alarm signal having a different pulse width for each of the detection circuits that has detected an abnormality; and a protection operation determining circuit that determines whether or not a protection function of the semiconductor element is operating based on the error signal and the alarm signal, and shuts off input of a drive signal to the semiconductor element when it is determined that the protection function is operating.

Abstract: A communication signal terminal receives a first communication signal which includes an address of a first IC and a first configuration value for the first IC, and a second communication signal which includes an address of a second IC and a second configuration value for the second IC. A data common bus is connected to the communication signal terminal and transmits the first communication signal and the second communication signal. The first IC is configured to receive the first communication signal transmitted through the data common bus, and store first configuration value for the first IC included in the second communication signal. The second IC is configured to receive the second communication signal transmitted through the data common bus, and store the second configuration value for the second IC stored in the second communication signal.

Abstract: According to one embodiment, a semiconductor device includes: a first switch SWx which switches whether or not to supply a first power supply voltage Vx generated by accumulating a charge outputted from a power source 10, as a second power supply voltage VDD to a first circuit 13, and a second switch SW1 which switches whether or not to connect to the first circuit 13 a smoothing capacitor C1 which suppresses a fluctuation of the second power supply voltage VDD, and the first switch SWx is switched to an on state in response to that the first power supply voltage Vx has reached a sufficient voltage, and then the second switch SW1 is switched to the on state in response to that the second power supply voltage VDD has reached a sufficient voltage.

Abstract: A communication signal terminal receives a first communication signal which includes an address of a first IC and a first configuration value for the first IC, and a second communication signal which includes an address of a second IC and a second configuration value for the second IC. A data common bus is connected to the communication signal terminal and transmits the first communication signal and the second communication signal. The first IC is configured to receive the first communication signal transmitted through the data common bus, and store first configuration value for the first IC included in the second communication signal. The second IC is configured to receive the second communication signal transmitted through the data common bus, and store the second configuration value for the second IC stored in the second communication signal.

Abstract: A power supply device includes a plurality of power sources each including an antenna and an AC/DC conversion unit that converts an AC signal received by the antenna to a DC signal, a plurality of consolidating units each including a first consolidating circuit that selectively consolidates a plurality of DC signals supplied by the plurality of power sources, and a power supply unit that includes a second consolidating circuit that selectively consolidates DC signals output from the plurality of consolidating units, and a first voltage conversion circuit that converts a DC signal resulting from consolidation in the second consolidating circuit, to a predetermined voltage.

Abstract: According to one embodiment, a semiconductor device includes: a first switch SWx which switches whether or not to supply a first power supply voltage Vx generated by accumulating a charge outputted from a power source 10, as a second power supply voltage VDD to a first circuit 13, and a second switch SW1 which switches whether or not to connect to the first circuit 13 a smoothing capacitor C1 which suppresses a fluctuation of the second power supply voltage VDD, and the first switch SWx is switched to an on state in response to that the first power supply voltage Vx has reached a sufficient voltage, and then the second switch SW1 is switched to the on state in response to that the second power supply voltage VDD has reached a sufficient voltage.

Abstract: According to one embodiment, a semiconductor device includes: a first switch SWx which switches whether or not to supply a first power supply voltage Vx generated by accumulating a charge outputted from a power source 10, as a second power supply voltage VDD to a first circuit 13, and a second switch SW1 which switches whether or not to connect to the first circuit 13 a smoothing capacitor C1 which suppresses a fluctuation of the second power supply voltage VDD, and the first switch SWx is switched to an on state in response to that the first power supply voltage Vx has reached a sufficient voltage, and then the second switch SW1 is switched to the on state in response to that the second power supply voltage VDD has reached a sufficient voltage.

Abstract: A semiconductor device is provided which can quickly detect a malfunction of high priority modules by frequently checking a coupling state between the high priority modules and a communication bus. According to an embodiment, a host controller includes a module control circuit that performs data communication with a plurality of externally-provided modules through a communication bus, a coupling state check circuit which is coupled to the communication bus and which checks the presence or absence of a response from the modules, and selected from the modules based on information of a check list, and a control circuit that selectively causes the module control circuit and the coupling state check circuit to operate.

Abstract: A power supply device includes a plurality of power sources each including an antenna and an AC/DC conversion unit that converts an AC signal received by the antenna to a DC signal, a plurality of consolidating units each including a first consolidating circuit that selectively consolidates a plurality of DC signals supplied by the plurality of power sources, and a power supply unit that includes a second consolidating circuit that selectively consolidates DC signals output from the plurality of consolidating units, and a first voltage conversion circuit that converts a DC signal resulting from consolidation in the second consolidating circuit, to a predetermined voltage.

Abstract: There is a problem in the prior semiconductor devices that energy recovery efficiency is low. According to one embodiment of the present invention, a power supply circuit includes an alternating-current signal synthesis unit including a plurality of alternating-current coupling elements having primary sides to which respective input alternating-current signals are input and secondary sides connected in series with each other, and a control circuit that outputs an input selection signal specifying a combination of the input alternating-current signals to be synthesized. The control circuit generates the input selection signal so as to maximize the output alternating-current signal synthesized by the alternating-current synthesis signal unit.

Abstract: A power supply device according to an embodiment comprises a plurality of power sources 10 each including an antenna and an AC/DC conversion unit, a plurality of consolidating units 13_1 to 13_i, and a power supply unit 15. The consolidating units 13_1 to 13_i respectively include consolidating circuits 14_1 to 14_i that selectively consolidate a plurality of DC signals 21_1 to 21_n supplied by the plurality of power sources 10. The power supply unit 15 includes a consolidating circuit 16 that selectively consolidates the DC signals 21_1 to 21_i output from the plurality of consolidating units 13_1 to 13_i, and a voltage conversion circuit 17 that converts a DC signal 23 resulting from consolidation in the consolidating circuit 16, to a predetermined voltage.

Abstract: An instruction execution control system includes a plurality of instruction storage units configured to output instructions in an FIFO order to a plurality of instruction execution units configured to execute the instructions; an instruction control unit configured to assign each of a plurality of the sequentially input instructions to one of the instruction storage units, and an output control unit configured to control the output of the instructions from the instruction storage units. When the input instruction is a dummy instruction to be inserted between instructions that should be executed in an execution order, the instruction control unit distributes the input instruction to the plurality of instruction storage units. The output control unit stops the output of the instructions from the instruction storage unit, the instruction output therefrom has become the dummy instruction, to the instruction execution unit until instructions output from all instruction storage units become the dummy instructions.

Abstract: A semiconductor device is provided which can quickly detect a malfunction of high priority modules by frequently checking a coupling state between the high priority modules and a communication bus. According to an embodiment, a host controller includes a module control circuit that performs data communication with a plurality of externally-provided modules through a communication bus, a coupling state check circuit which is coupled to the communication bus and which checks the presence or absence of a response from the modules, and selected from the modules based on information of a check list, and a control circuit that selectively causes the module control circuit and the coupling state check circuit to operate.