Patents by Inventor Koji Komemura

Koji Komemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10327340
    Abstract: A method for producing circuit board, including: adhering plastic deformable insulating material onto surface of laminate, which contains second-metal-layer of second metal, and first-metal-layer in pattern on second-metal-layer, and the surface of the laminate is surface of second-metal-layer where first-metal-layer is formed, and surface of first-metal-layer, followed by curing the material, and removing second-metal-layer to form plate structure to which first-metal-layer in pattern is formed; opening hole in cured material from surface of the plate structure opposite to surface thereof where first-metal-layer is formed, until the hole reaches first-metal-layer; filling the hole with electroconductive paste, to form the plate structure filled therewith; and laminating one plate structure filled therewith with the other plate structure filled therewith in manner that first-metal-layer of one plate structure filled therewith faces opening of the hole of other plate structure filled therewith, wherein first-m
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: June 18, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Kenji Iida, Takashi Nakagawa, Seigo Yamawaki, Yasuhiro Karahashi, Junichi Kanai, Koji Komemura
  • Patent number: 10109571
    Abstract: A wiring substrate includes a laminated sheet including a first conductor pattern, an inorganic dielectric layer, and a second conductor pattern. The first conductor pattern, the inorganic dielectric layer, and the second conductor pattern are laminated in this order. Also, the first conductor pattern is divided into a plurality of regions.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: October 23, 2018
    Assignees: FUJITSU LIMITED, SONY CORPORATION
    Inventors: Kei Fukui, Kazuya Arai, Koji Komemura, Kazuhiko Iijima, Kenichiro Abe, Shinji Rokuhara, Shuichi Oka
  • Publication number: 20170347465
    Abstract: A method for producing circuit board, including: adhering plastic deformable insulating material onto surface of laminate, which contains second-metal-layer of second metal, and first-metal-layer in pattern on second-metal-layer, and the surface of the laminate is surface of second-metal-layer where first-metal-layer is formed, and surface of first-metal-layer, followed by curing the material, and removing second-metal-layer to form plate structure to which first-metal-layer in pattern is formed; opening hole in cured material from surface of the plate structure opposite to surface thereof where first-metal-layer is formed, until the hole reaches first-metal-layer; filling the hole with electroconductive paste, to form the plate structure filled therewith; and laminating one plate structure filled therewith with the other plate structure filled therewith in manner that first-metal-layer of one plate structure filled therewith faces opening of the hole of other plate structure filled therewith, wherein first-m
    Type: Application
    Filed: August 15, 2017
    Publication date: November 30, 2017
    Inventors: Kenji Iida, Takashi Nakagawa, Seigo Yamawaki, Yasuhiro Karahashi, Junichi Kanai, Koji Komemura
  • Patent number: 9769936
    Abstract: A method for producing circuit board, including: adhering plastic deformable insulating material onto surface of laminate, which contains second-metal-layer of second metal, and first-metal-layer in pattern on second-metal-layer, and the surface of the laminate is surface of second-metal-layer where first-metal-layer is formed, and surface of first-metal-layer, followed by curing the material, and removing second-metal-layer to form plate structure to which first-metal-layer in pattern is formed; opening hole in cured material from surface of the plate structure opposite to surface thereof where first-metal-layer is formed, until the hole reaches first-metal-layer; filling the hole with electroconductive paste, to form the plate structure filled therewith; and laminating one plate structure filled therewith with the other plate structure filled therewith in manner that first-metal-layer of one plate structure filled therewith faces opening of the hole of other plate structure filled therewith, wherein first-m
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: September 19, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kenji Iida, Takashi Nakagawa, Seigo Yamawaki, Yasuhiro Karahashi, Junichi Kanai, Koji Komemura
  • Publication number: 20170103944
    Abstract: A wiring substrate includes a laminated sheet including a first conductor pattern, an inorganic dielectric layer, and a second conductor pattern. The first conductor pattern, the inorganic dielectric layer, and the second conductor pattern are laminated in this order. Also, the first conductor pattern is divided into a plurality of regions.
    Type: Application
    Filed: September 28, 2016
    Publication date: April 13, 2017
    Applicants: FUJITSU LIMITED, SONY CORPORATION
    Inventors: Kei FUKUI, Kazuya Arai, Koji Komemura, Kazuhiko Iijima, Kenichiro Abe, Shinji Rokuhara, Shuichi Oka
  • Publication number: 20160338193
    Abstract: A multilayer board disclosed herein includes: a plurality of insulating layers made of a thermosetting resin and stacked on one another, each insulating layer being provided with a via hole; a plurality of wiring each formed between the insulating layers and including an inclined side surface; and a conductive via made of a cured product of conductive paste filled in the via hole and connecting the vertically adjacent wiring to each other. Here, orientations of the inclined side surfaces are alternately changed from the wiring to the wiring.
    Type: Application
    Filed: April 15, 2016
    Publication date: November 17, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Junichi Kanai, Yasuhiro Karahashi, Hirofumi Kobayashi, Shunsuke KOGOI, Junichi Murayama, Koji Komemura, Hidehiko Fujisaki
  • Patent number: 9192058
    Abstract: A method for manufacturing a component built-in substrate is disclosed, which can attain high densities of components and wirings. The method includes: mounting electronic components on a predetermined member with its surface being provided with a first layer enabled to be exfoliated; stacking a second layer to fill the electronic components further on the first layer; exfoliating and removing the predetermined member from a stacked body configured by stacking the second layer on the first layer; and forming a via to penetrate the first layer and conduct to the electronic components from a surface of the surfaces of the stacked body, from which the predetermined member is removed.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 17, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Kei Fukui, Koji Komemura, Hiromitsu Kobayashi, Mitsuo Denda
  • Publication number: 20150195918
    Abstract: A method for manufacturing a component built-in substrate is disclosed, which can attain high densities of components and wirings. The method includes: mounting electronic components on a predetermined member with its surface being provided with a first layer enabled to be exfoliated; stacking a second layer to fill the electronic components further on the first layer; exfoliating and removing the predetermined member from a stacked body configured by stacking the second layer on the first layer; and forming a via to penetrate the first layer and conduct to the electronic components from a surface of the surfaces of the stacked body, from which the predetermined member is removed.
    Type: Application
    Filed: December 19, 2014
    Publication date: July 9, 2015
    Inventors: Kei FUKUI, Koji Komemura, Hiromitsu KOBAYASHI, Mitsuo DENDA
  • Publication number: 20150029679
    Abstract: A method for producing circuit board, including: adhering plastic deformable insulating material onto surface of laminate, which contains second-metal-layer of second metal, and first-metal-layer in pattern on second-metal-layer, and the surface of the laminate is surface of second-metal-layer where first-metal-layer is formed, and surface of first-metal-layer, followed by curing the material, and removing second-metal-layer to form plate structure to which first-metal-layer in pattern is formed; opening hole in cured material from surface of the plate structure opposite to surface thereof where first-metal-layer is formed, until the hole reaches first-metal-layer; filling the hole with electroconductive paste, to form the plate structure filled therewith; and laminating one plate structure filled therewith with the other plate structure filled therewith in manner that first-metal-layer of one plate structure filled therewith faces opening of the hole of other plate structure filled therewith, wherein first-m
    Type: Application
    Filed: June 10, 2014
    Publication date: January 29, 2015
    Inventors: Kenji Iida, Takashi Nakagawa, Seigo Yamawaki, Yasuhiro Karahashi, Junichi Kanai, Koji Komemura