Abstract: A sintered Nd base magnet segment has a coercive force high at the periphery and lower toward the inside. A method for preparing the magnet includes the steps of: (a) providing a sintered Nd base magnet block having surfaces and a magnetization direction, (b) coating the surfaces of the magnet block excluding the surface perpendicular to the magnetization direction with a Dy or Tb oxide powder, a Dy or Tb fluoride powder, or a Dy or Tb-containing alloy powder, (c) treating the coated block at a high temperature for causing Dy or Tb to diffuse into the block, and (d) cutting the block in a plane perpendicular to the magnetization direction into a magnet segment having a coercive force distribution on the cut section that the coercive force is high at the periphery and lower toward the inside and a constant coercive force distribution in the magnetization direction.

Abstract: A linear mark extending perpendicular to a primary step direction of stepped terrace for a three-dimensional memory device can be employed as a reference feature for aligning a trimming material layer before initiating an etch-and-trim process sequence. The linear mark can be formed as a linear trench or a linear rail structure. The distance between a sidewall of each trimming material layer and the linear mark can be measured at multiple locations that are laterally spaced apart perpendicular to the primary step direction to provide statistically significant data points, which can be employed to provide an enhanced control of the staircase patterning process. Likewise, locations of patterned stepped surfaces can be measured at multiple locations to provide enhanced control of the locations of vertical steps in the stepped terrace.

Abstract: The present invention provides a memory element and a memory device realizing reduced variations in resistance values in an initial state or erase state of a plurality of memory elements and capable of retaining the resistance value in a write/erase state for writing/erasing operations of a plurality of times. The memory element includes a first electrode, a memory layer, and a second electrode in order. The memory layer has: an ion source layer containing at least one of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and at least one metal element selected from copper (Cu), silver (Ag), zinc (Zn), and zirconium (Zr); and two or more high-resistance layers having a resistance value higher than that of the ion source layer and having different compositions.

Abstract: An alternating stack of insulator layers and spacer material layers is formed over a substrate. Stepped surfaces are formed in a contact region in which contact via structures are to be subsequently formed. An epitaxial semiconductor pedestal can be formed by a single epitaxial deposition process that is performed after formation of the stepped surfaces and prior to formation of memory openings, or a combination of a first epitaxial deposition process performed prior to formation of memory openings and a second epitaxial deposition process performed after formation of the memory openings. The epitaxial semiconductor pedestal can have a top surface that is located above a topmost surface of the alternating stack. The spacer material layers are formed as, or can be replaced with, electrically conductive layers. Backside contact via structures can be subsequently formed.

Abstract: A multi-tier memory device is formed over a substrate such that memory stack structures extend through an alternating stack of insulating layers and electrically conductive layers within each tier. Bit lines are formed between an underlying tier having drain regions over semiconductor channels and an overlying tier having drain regions under semiconductor channel, such that the bit lines are shared between the underlying tier and the overlying tier. Source lines can be formed over each tier in which source regions overlie semiconductor channels and drain regions. If another tier is present above the source lines, the source lines can be shared between two vertically neighboring tiers.

Abstract: A method of fabricating a memory device is provided. The method includes forming a first alternating stack of insulator layers and spacer material layers over a semiconductor substrate, etching the first alternating stack to expose a single crystalline semiconductor material, forming a first epitaxial semiconductor pedestal on the single crystalline semiconductor material, such that the first epitaxial semiconductor pedestal is in epitaxial alignment with the single crystalline semiconductor material, forming an array of memory stack structures through the first alternating stack, and forming at least one semiconductor device over the first epitaxial semiconductor pedestal.

Abstract: A resistive memory includes a memory cell having a first electrode, a second electrode and a resistive memory element between the first electrode and the second electrode. The memory cell includes a thermally insulating region. The thermally insulating region may be included in at least one electrode of the memory cell and/or within an electrically insulating region. The thermally insulating region can confine heat within the memory cell and thereby can reduce the current and/or voltage needed to write information in the resistive memory element.

Abstract: The present invention provides a memory element and a memory device realizing reduced variations in resistance values in an initial state or erase state of a plurality of memory elements and capable of retaining the resistance value in a write/erase state for writing/erasing operations of a plurality of times. The memory element includes a first electrode, a memory layer, and a second electrode in order. The memory layer has: an ion source layer containing at least one of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and at least one metal element selected from copper (Cu), silver (Ag), zinc (Zn), and zirconium (Zr); and two or more high-resistance layers having a resistance value higher than that of the ion source layer and having different compositions.

Abstract: The present invention provides a memory element and a memory device realizing reduced variations in resistance values in an initial state or erase state of a plurality of memory elements and capable of retaining the resistance value in a write/erase state for writing/erasing operations of a plurality of times. The memory element includes a first electrode, a memory layer, and a second electrode in order. The memory layer has: an ion source layer containing at least one of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and at least one metal element selected from copper (Cu), silver (Ag), zinc (Zn), and zirconium (Zr); and two or more high-resistance layers having a resistance value higher than that of the ion source layer and having different compositions.

Abstract: A manufacturing method of a memory apparatus in which memory devices each having a memory layer whose resistance value reversibly varies by voltage application between bottom and upper electrodes are formed, includes: forming and shaping a bottom electrode material film into a first linear pattern extending in a first direction; forming a memory layer material film and an upper electrode material film in this order on the bottom electrode material film; forming the upper electrodes and the memory layers by shaping the upper electrode material film and the memory layer material film into a second linear pattern extending in a second direction intersecting with the first direction; and forming the bottom electrodes having a quadrangle plane shape at regions where the first linear pattern intersect with the second linear pattern by shaping the bottom electrode material film into the second linear pattern.

Abstract: In one aspect, the present invention provides electronic devices that comprise a doped semiconductor shared contact between (a) a gate conductor region of at least one transistor and (b) a source/drain diffusion region of at least one transistor. One specific example of such as shared contact, among many others, is a doped SiGe shared contact between (a) a gate conductor region shared by an N-channel MOSFET and a P-channel MOSFET and (b) a drain diffusion region of an N-channel MOSFET or of a P-channel MOSFET.

Abstract: In one aspect, the present invention provides electronic devices that comprise a doped semiconductor shared contact between (a) a gate conductor region of at least one transistor and (b) a source/drain diffusion region of at least one transistor. One specific example of such as shared contact, among many others, is a doped SiGe shared contact between (a) a gate conductor region shared by an N-channel MOSFET and a P-channel MOSFET and (b) a drain diffusion region of an N-channel MOSFET or of a P-channel MOSFET.

Abstract: A sintered Nd base magnet segment has a coercive force high at the periphery and lower toward the inside. A method for preparing the magnet includes the steps of: (a) providing a sintered Nd base magnet block having surfaces and a magnetization direction, (b) coating the surfaces of the magnet block excluding the surface perpendicular to the magnetization direction with a Dy or Tb oxide powder, a Dy or Tb fluoride powder, or a Dy or Tb-containing alloy powder, (c) treating the coated block at a high temperature for causing Dy or Tb to diffuse into the block, and (d) cutting the block in a plane perpendicular to the magnetization direction into a magnet segment having a coercive force distribution on the cut section that the coercive force is high at the periphery and lower toward the inside and a constant coercive force distribution in the magnetization direction.

Abstract: A method for preparing the magnet includes the steps of: (a) providing a sintered Nd base magnet block having surfaces and a magnetization direction, (b) coating the surfaces of the magnet block excluding the surface perpendicular to the magnetization direction with a Dy or Tb oxide powder, a Dy or Tb fluoride powder, or a Dy or Tb-containing alloy powder, (c) treating the coated block at a high temperature for causing Dy or Tb to diffuse into the block, and (d) cutting the block in a plane perpendicular to the magnetization direction into a magnet segment having a coercive force distribution on the cut section that the coercive force is high at the periphery and lower toward the inside and a constant coercive force distribution in the magnetization direction.

Abstract: A memory device includes: a transistor array having transistors; and memory elements provided, one for each of the transistors. The transistor array includes a substrate having diffusion layers on a surface thereof, parallel word lines on the substrate, parallel first bit lines provided in a direction perpendicular to the word lines, bit contact electrodes between the adjacent two word lines and connecting the first bit lines and the diffusion layers, and node contact electrodes at an opposite side to the bit contact electrodes with the two word lines in between and connected to the diffusion layers. The memory elements have lower electrodes connected to the node contact electrodes, memory layers on the lower electrodes and having resistance values reversibly changing by voltage application, and parallel second bit lines extending in the same direction as that of the first bit lines on the memory layers.

Abstract: A semiconductor device having a substrate including a photodiode; a resin layer formed on an upper surface of the substrate, the resin layer not covering a light receiving region of the photodiode, the resin layer including at least one groove surrounding the light receiving region; and a molding resin portion formed by mold-sealing the photodiode with the resin layer thereon so as not to cover the light receiving region.

Abstract: A method for assembling rotors which is applicable to a large axial gap type permanent magnet rotating machine. A permanent magnet rotating machine comprising: a rotating shaft; at least two rotors comprising a table-like structure and permanent magnets attached thereto, the table-like structures being connected to the rotating shaft and being disposed in an axial direction of the rotating shaft; and a stator comprising a table-like structure and stator coils around which a copper wire is wound, said stator being disposed in a gap formed by the rotors so that the stator being separated from the rotating shaft, is manufactured by the following steps of assembling the two rotors such that a predetermined gap is formed therebetween; and mounting the magnets on the table-like structures by inserting the magnet from the radially outer side of the table-like structures towards the center of the rotation.

Abstract: The present invention is directed to provide a signal discriminating device realizing signal discrimination which enables a more appropriate signal process to be performed according to a signal source and a state of an input video signal. The signal discriminating device includes: a comparing section comparing a motion magnitude between two fields of an input video signal with one or more predetermined motion magnitude patterns which are provided in correspondence with one or more signal sources, so as to determine one or more degrees of match or mismatch between the motion magnitude and the motion magnitude patterns; and a discriminating section discriminating a signal source of the input video signal in consideration of the degree of certainty or uncertainty of discrimination, the degree of certainty or uncertainty being determined on the basis of the degrees of match or mismatch determined in the comparing section.

Abstract: It is an object of the invention to provide a disk case capable of easily determining a disk without changing hardware of a drive unit. A disk case of the present invention includes a case body in which a disk is held, an opening through which a portion of the disk is exposed, a shutter for opening and closing the opening, and a bridge portion located at an outer periphery of the disk and at the opening, wherein a dent having a diameter greater than an inner peripheral diameter of the bridge portion is formed at a position of a pickup moving path of the bridge portion.

Abstract: To reduce the cogging torque of servomotors, electric power steering motors, and others, there is provided a permanent magnet motor comprising: a rotor 10 comprising a rotor yoke 11 and a plurality of permanent magnets (M1-M10); and a stator 20 comprising a stator yoke 22, salient magnetic poles 21, and armature windings 23, wherein at least one of the permanent magnets is disposed in an adjustment position that is displaced from a corresponding reference position in at least one of the circumferential, radial, and axial directions of the rotor yoke, and the plurality of permanent magnets excluding the permanent magnet disposed in the adjustment position is disposed in the reference positions, and wherein the adjustment position is set so that the permanent magnet motor in which at least one of the plurality of permanent magnets is disposed in the adjustment position has a smaller cogging torque than a permanent magnet motor in which all of the plurality of permanent magnets are disposed in the reference posi