Patents by Inventor Kok Yau Chua

Kok Yau Chua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10396007
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: August 27, 2019
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Soon Lock Goh, Swee Kah Lee, Joachim Mahler, Mei Chin Ng, Beng Keh See, Guan Choon Matthew Nelson Tee
  • Publication number: 20190181120
    Abstract: Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 13, 2019
    Inventors: Chau Fatt Chiang, April Coleen Tuazon Bernardez, Junny Abdul Wahid, Roslie Saini bin Bakar, Kon Hoe Chin, Hock Heng Chong, Kok Yau Chua, Hsieh Ting Kuek, Chee Hong Lee, Soon Lee Liew, Nurfarena Othman, Pei Luan Pok, Werner Reiss, Stefan Schmalzl
  • Patent number: 10304780
    Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: May 28, 2019
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng, Valentyn Solomko
  • Publication number: 20190023561
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 24, 2019
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Patent number: 10163812
    Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: December 25, 2018
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng, Valentyn Solomko
  • Patent number: 10155657
    Abstract: The electronic device comprises a semiconductor chip comprising a first main face, a second main face opposite to the first main face, side faces connecting the first and second main faces, and a sensor element or actuator element disposed at the first main face, and a substrate, wherein the semiconductor chip is disposed above the substrate, the first main face of the semiconductor chip facing the substrate, wherein the substrate comprises a substrate opening, the substrate opening permitting passage of signals to the sensor element or from the actuator element.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: December 18, 2018
    Assignee: Infineon Technologies AG
    Inventors: Matthias Steiert, Kok Yau Chua, Chu Hua Goh, Woon Yau Lim, Christina Yeong
  • Publication number: 20180308804
    Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.
    Type: Application
    Filed: July 2, 2018
    Publication date: October 25, 2018
    Applicant: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang NG, Valentyn Solomko
  • Publication number: 20180108616
    Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.
    Type: Application
    Filed: October 19, 2016
    Publication date: April 19, 2018
    Applicant: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang NG, Valentyn Solomko
  • Patent number: 9868632
    Abstract: A base plate with a first side having an elevated portion, a recessed portion laterally surrounding the elevated portion, and a vertical face extending from the recessed portion to the elevated portion is provided. At least a part of the vertical face is covered with a metal layer. A mold compound structure is formed on the first side with the metal layer disposed between the first side and the mold compound structure such that the mold compound structure includes an elevated portion laterally surrounding a recessed portion, and opposing edge faces that vertically extend from the recessed portion to the elevated portion. At least a part of the base plate is subsequently removed such that the recessed portion of the mold compound structure is uncovered from the base plate and such that the metal layer remains on at least one uncovered section of the mold compound structure.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: January 16, 2018
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng, Horst Theuss
  • Publication number: 20170275159
    Abstract: A base plate with a first side having an elevated portion, a recessed portion laterally surrounding the elevated portion, and a vertical face extending from the recessed portion to the elevated portion is provided. At least a part of the vertical face is covered with a metal layer. A mold compound structure is formed on the first side with the metal layer disposed between the first side and the mold compound structure such that the mold compound structure includes an elevated portion laterally surrounding a recessed portion, and opposing edge faces that vertically extend from the recessed portion to the elevated portion. At least a part of the base plate is subsequently removed such that the recessed portion of the mold compound structure is uncovered from the base plate and such that the metal layer remains on at least one uncovered section of the mold compound structure.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 28, 2017
    Inventors: Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng, Horst Theuss
  • Publication number: 20170256472
    Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.
    Type: Application
    Filed: March 2, 2017
    Publication date: September 7, 2017
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE
  • Publication number: 20170081175
    Abstract: The electronic device comprises a semiconductor chip comprising a first main face, a second main face opposite to the first main face, side faces connecting the first and second main faces, and a sensor element or actuator element disposed at the first main face, and a substrate, wherein the semiconductor chip is disposed above the substrate, the first main face of the semiconductor chip facing the substrate, wherein the substrate comprises a substrate opening, the substrate opening permitting passage of signals to the sensor element or from the actuator element.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 23, 2017
    Applicant: Infineon Technologies AG
    Inventors: Matthias Steiert, Kok Yau Chua, Chu Hua Goh, Woon Yau Lim, Christina Yeong
  • Patent number: 9475691
    Abstract: A semiconductor package includes an electrically conductive lead-frame, including a first die paddle having a first opening, and a plurality of electrically conductive leads, a ridge formed around a perimeter of the first opening, and an electrically insulating molding compound. The electrically insulating molding compound includes an interior cavity being defined by a planar base surface and outer sidewalls, a second opening formed in the base surface, and an interior sidewall within the interior cavity. The molding compound is formed around the lead-frame with the first die paddle in the interior cavity. The first and second openings are aligned with one another so as to form a port that provides access to the interior cavity. The ridge and the interior sidewall form a dam that is configured to collect liquefied sealant and prevent the liquefied sealant from overflowing into the port or into adjacent regions of the interior cavity.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: October 25, 2016
    Assignee: Infineon Technologies AG
    Inventors: Kok Yau Chua, Sook Woon Chan, Chau Fatt Chiang, Stefan Martens, Matthias Steiert, Kian Hong Yeo, Hock Siang Chua, Mei Chin Ng, Swee Kah Lee