Patents by Inventor KOSUKE SAKAZUME

KOSUKE SAKAZUME has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11452201
    Abstract: To provide an electronic device and a connecting component which have a shield function and which enable downsizing. The electronic device includes: a substrate having a first substrate portion and a second substrate portion that is arranged at a position facing the first substrate portion; a plurality of potential wirings which are connected to the first substrate portion and to the second substrate portion and which have an arbitrary potential; and a plurality of signal wirings which are connected to the first substrate portion and to the second substrate portion and to which a signal is supplied. The first substrate portion has a mounting region of an electronic component on a side of a surface facing the second substrate portion. The plurality of potential wirings are arranged outside of the mounting region.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: September 20, 2022
    Assignee: SONY CORPORATION
    Inventors: Keiichi Hirano, Akihiro Horii, Yoshiyuki Nomura, Keiji Niina, Kosuke Sakazume
  • Publication number: 20210392740
    Abstract: To provide an electronic device and a connecting component which have a shield function and which enable downsizing. The electronic device includes: a substrate having a first substrate portion and a second substrate portion that is arranged at a position facing the first substrate portion; a plurality of potential wirings which are connected to the first substrate portion and to the second substrate portion and which have an arbitrary potential; and a plurality of signal wirings which are connected to the first substrate portion and to the second substrate portion and to which a signal is supplied. The first substrate portion has a mounting region of an electronic component on a side of a surface facing the second substrate portion. The plurality of potential wirings are arranged outside of the mounting region.
    Type: Application
    Filed: September 5, 2019
    Publication date: December 16, 2021
    Inventors: KEIICHI HIRANO, AKIHIRO HORII, YOSHIYUKI NOMURA, KEIJI NIINA, KOSUKE SAKAZUME