Abstract: A semiconductor device includes: a first electrode, a first insulating layer, a second insulating layer, and a second electrode arranged in a stacking direction; a gate electrode interposed between the first and second insulating layers in the stacking direction, and extending in a first direction; and a channel layer penetrating the gate electrode and coupled to the first electrode and the second electrode. The channel layer has a first cross-sectional area at a height position of the first insulating layer and a second cross-sectional area at a height position of the gate electrode, the first cross-sectional area is larger than the second cross-sectional area. The gate electrode has a wider width at a penetrating portion of the channel layer than any other portions in a second direction intersecting the stacking direction and the first direction.

Abstract: A semiconductor device includes a first electrode, an oxide semiconductor layer electrically connected to the first electrode and disposed above the first electrode, a gate electrode facing the oxide semiconductor layer with an insulating film interposed therebetween, and a second electrode including a first conductive layer electrically connected to the oxide semiconductor layer and disposed above the oxide semiconductor layer, the first conductive layer containing oxygen, indium, and tin. The second electrode further includes a second conductive layer in contact with the first conductive layer and containing oxygen and a first metal and a third conductive layer in contact with the second conductive layer and containing the first metal.

Abstract: A semiconductor device includes a first insulating layer; an oxide semiconductor formed in the first insulating layer, extending in a first direction, and having a first end and a second end; a first electrode including a first metal film that includes a first metal atom, and a first conductive film that is formed between the first metal film and the first end of the oxide semiconductor and includes metal oxide; a second electrode in contact with the second end of the oxide semiconductor; at least a pair of gate electrodes that face each other via an insulating film, and are interposed between the first end and the second end of the oxide semiconductor; and a first structure that is separated from the first electrode in a second direction intersecting the first direction, includes at least the first metal atom, and does not include the metal oxide.

Abstract: A semiconductor device includes a first oxide semiconductor layer extending in a first direction, a first wiring extending in a second direction that intersects the first direction and surrounding the first oxide semiconductor layer, a first insulating film provided between the first wiring and the first oxide semiconductor layer, a first conductor provided on the first oxide semiconductor layer, a second wiring provided on the first conductor and extending in a third direction that intersects each of the first direction and the second direction, a first insulating layer in contact with a side surface of the second wiring, and a second insulating layer provided on the first insulating layer and having oxygen permeability lower than oxygen permeability of the first insulating layer.

Abstract: A semiconductor device includes a semiconductor substrate, a memory capacitor provided on the semiconductor substrate, a first conductor provided above the memory capacitor and extending in a first direction, a second conductor provided above the first conductor and extending in the first direction, an oxide semiconductor layer provided between the first conductor and the second conductor and extending in the first direction, a conductive oxide layer between the second conductor and the oxide semiconductor layer, a first conductive layer between the conductive oxide layer and the second conductor, and an insulating layer in contact with the conductive oxide layer, wherein a portion of the conductive oxide layer is between and aligned with the first insulating layer and the oxide semiconductor layer in the first direction.

Abstract: A semiconductor device includes a substrate where a first and a second region are provided, a transistor layer, and a first wiring layer farther from the substrate than the transistor layer. The transistor layer includes, in the first region, oxide semiconductor layers extending in a first direction and arranged in a second direction, a first wiring opposed to oxide semiconductor layers, and gate insulating films. The first wiring layer includes second wirings and connected to one ends of oxide semiconductor layers in the first region. The transistor layer includes cavities arranged in the second or the third direction at first pitches in the second region. The first wiring layer includes a first conductive layer in the second region. Recessed portions arranged in the second direction or the third direction at the first pitches are provided on a surface of the first conductive layer.

Abstract: A technique of manufacturing a semiconductor device includes forming a film on a substrate in a process chamber by supplying a precursor and a reactant to the substrate under a first temperature at which the precursor and the reactant are not pyrolyzed, and purging, after performing the act of forming the film, an interior of the process chamber by supplying at least one selected from a group consisting of a plasma-excited gas, an alcohol, and a reducing agent into the process chamber under a second temperature equal to or lower than the first temperature.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: A certain embodiment includes: first wiring layers extended in a first direction and arranged in a second direction; second wiring layers provided above the first wiring layer of a third direction and arranged in the first direction and extended in the second direction; first stacked structures comprising a first memory cell disposed between the second and first wiring layers at a crossing portion between the second and first wiring layers; first conductive layers provided in the same layer as the first wiring layers, adjacent to the first wiring layer in the second direction, and not connected to other than the second wiring layer; second stacked structures disposed at crossing portions between the second wiring layers and the first conductive layers; and an insulation layer provided between the first stacked structures and between the second stacked structures having a Young's modulus larger than that of the insulation layer.

Abstract: A semiconductor storage device includes a first oxide semiconductor layer that extends in a first direction; a second oxide semiconductor layer that extends in the first direction and is adjacent to the first oxide semiconductor layer in a second direction intersecting to the first direction; first wiring that extends in a third direction intersecting to the first direction and overlaps with the first oxide semiconductor layer in the third direction; second wiring that extends in the third direction and overlaps with the second oxide semiconductor layer in the third direction; a first insulating film that is provided between the first wiring and the first oxide semiconductor layer; a second insulating film that is provided between the second wiring and the second oxide semiconductor layer; a first conductor that is provided on the first oxide semiconductor layer; a second conductor that is provided on the second oxide semiconductor layer; and an insulating layer that has a gap between the first conductor and

Abstract: A semiconductor device includes a semiconductor substrate, a first layer formed on the semiconductor substrate and including a semiconductor element and a first insulating film, a second layer formed above the first layer and including a channel including an oxide semiconductor and a second insulating film, and a third layer formed above the second layer, and including an electrode formed on the channel and a third insulating film having a film density less than at least one of a film density of the first insulating film or a film density of the second insulating film.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Abstract: A semiconductor device includes a channel filling a through via hole and including an oxide semiconductor; a first electrode disposed on the channel and formed of a conductive oxide; and a second electrode disposed on the first electrode and formed of a metal.

Abstract: A semiconductor device according to an embodiment includes: a first electrode; a second electrode; a gate electrode between the first electrode and the second electrode; a first insulating layer; a second insulating layer; a gate insulating layer surrounding the gate electrode; an oxide semiconductor layer surrounding the gate insulating layer, the oxide semiconductor layer including a first region between the gate insulating layer and the first electrode, a second region between the gate insulating layer and the second electrode, a third region between the gate insulating layer and the first insulating layer, and a fourth region between the gate insulating layer and the second insulating layer. A first thickness of the first region and a second thickness of the second region are equal to or less than at least one of a third thickness of the third region or a fourth thickness of the fourth region.

Abstract: A semiconductor device includes: a semiconductor substrate including a first area and a second area; a plurality of memory cells provided in the first area; a mark provided in the second area and having a first side surface and a second side surface that intersects with the first side surface; and a plurality of patterns provided in the second area and provided on the first side surface and the second side surface.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Abstract: A semiconductor device includes: an oxide semiconductor layer extending in a first direction; a gate electrode overlapping the oxide semiconductor layer in a second direction intersecting the first direction; a gate insulating film provided between the gate electrode and the oxide semiconductor layer; a first conductive layer provided on the oxide semiconductor layer in the first direction and containing a conductive oxide; a second conductive layer provided on the first conductive layer in the first direction and containing a metal element; a first protective film in contact with a side surface of the second conductive layer; and a second protective film in contact with at least a part of a side surface or an upper surface of the first conductive layer. The first protective film and the second protective film each contain a material having an oxygen diffusion coefficient smaller than that of the second conductive layer.

Abstract: A semiconductor memory device includes a first interconnect, a second interconnect, a first storage layer, and a first insulating film. The first insulating film is provided along a surface of a part of the second interconnect and a surface of the first storage layer. The first insulating film is composed of Si, N, and O. The atomic ratio (N/O) between N and O in the first insulating film is not less than 1.0 at a first position which is the position of the second interconnect-side end surface of the first storage layer in a third direction. The atomic ratio (N/O) between N and O in the first insulating film is less than 1.0 at a second position which is the position of the end surface of the second interconnect, opposite to the first storage layer-side end surface, in the third direction.