Patents by Inventor Kouhei Toyotaka

Kouhei Toyotaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11837461
    Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: December 5, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Kei Takahashi, Kouhei Toyotaka, Masashi Tsubuku, Kosei Noda, Hideaki Kuwabara
  • Patent number: 11815775
    Abstract: The display apparatus includes a data generation circuit, a source driver circuit, and a pixel. The source driver circuit is electrically connected to the pixel through first and second wirings. The pixel includes a display device that is a liquid crystal device, a potential of one electrode of the display device can be a potential of the first wiring, and a potential of the other electrode of the display device can be a potential of the second wiring. The image data generation circuit has a function of generating digital image data including first and second data. One of the first and second wirings is made to have a potential corresponding to first data, and the other of the first and second wirings is made to have a potential corresponding to the second data. The potential of the first wiring and the potential of the second wiring are interchanged.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: November 14, 2023
    Inventors: Kei Takahashi, Susumu Kawashima, Koji Kusunoki, Kouhei Toyotaka, Kazunori Watanabe
  • Patent number: 11817726
    Abstract: Deterioration of a storage battery included in an electronic device is reduced. Power consumption of an electronic device is reduced. A power feeding device having excellent performance is provided. The power feeding device includes a power feeding coil, a control circuit, and a neural network and has a function of charging a storage battery with a wireless signal supplied by the power feeding coil. The control circuit has a function of estimating a remaining capacity value of the storage battery, the control circuit has a function of supplying the estimated remaining capacity value to the neural network, the neural network outputs a value corresponding to the supplied remaining capacity value to the control circuit, the control circuit determines a charge condition for the storage battery on the basis of the value output by the neural network, and the power feeding device has a function of charging the storage battery under the determined charge condition.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: November 14, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Koji Kusunoki, Toshiyuki Isa, Akihiro Chida, Kouhei Toyotaka, Ryota Tajima
  • Patent number: 11817698
    Abstract: A battery management circuit with a novel structure and a power storage device including the battery management circuit are provided. The power storage device includes a plurality of battery cells connected in series and a battery management circuit. The battery management circuit includes a voltage monitor circuit having a function of acquiring a voltage value between a pair of electrodes of any one of the battery cells. The voltage monitor circuit includes a multiplexer and a buffer circuit for outputting a signal for controlling the multiplexer. The multiplexer and the buffer circuit each include an n-channel transistor. The n-channel transistor is a transistor including an oxide semiconductor in a channel formation region. The multiplexer has a function of retaining an output voltage of the battery cell by setting the transistor in an off state.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: November 14, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Koji Kusunoki, Kouhei Toyotaka, Kazunori Watanabe
  • Publication number: 20230350256
    Abstract: A liquid crystal display device with a high aperture ratio is provided. The display device includes a transistor, a first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer, a pixel electrode, a common electrode, and a liquid crystal layer in a pixel. The first insulating layer is positioned over a channel formation region of the transistor. The first conductive layer is positioned over the first insulating layer. The second insulating layer is positioned over the transistor, the first insulating layer, and the first conductive layer. The pixel electrode is positioned over the second insulating layer, the third insulating layer is positioned over the pixel electrode, the common electrode is positioned over the third insulating layer, and the liquid crystal layer is positioned over the common electrode. The common electrode includes a region overlapping with the first conductive layer with the pixel electrode positioned therebetween.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 2, 2023
    Inventors: Kouhei TOYOTAKA, Kazunori WATANABE, Susumu KAWASHIMA, Kei TAKAHASHI, Koji KUSUNOKI, Masataka NAKADA, Ami SATO
  • Patent number: 11791344
    Abstract: A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: October 17, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kouhei Toyotaka, Kei Takahashi, Hideaki Shishido, Koji Kusunoki
  • Patent number: 11783757
    Abstract: A novel display is provided. A display having a small change in chromaticity of a micro light-emitting diode in proportion to current density is provided. A display capable of reducing power consumption in the driver circuit when displaying a still image is provided. The display includes a plurality of pixels each including a display element and a microcontroller. The microcontroller includes a first transistor, a triangular wave generator circuit, a comparator, a switch, and a constant current circuit. The first transistor has a function of retaining a potential corresponding to data written to the pixel by being switched off. The triangular wave generator circuit has a function of generating a triangular wave signal. The comparator has a function of generating an output signal corresponding to the potential and the triangular wave signal.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: October 10, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Koji Kusunoki, Kazunori Watanabe, Susumu Kawashima, Kouhei Toyotaka, Shunpei Yamazaki
  • Publication number: 20230307464
    Abstract: A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.
    Type: Application
    Filed: May 16, 2023
    Publication date: September 28, 2023
    Inventors: Kouhei TOYOTAKA, Jun KOYAMA, Hiroyuki MIYAKE
  • Publication number: 20230298537
    Abstract: A display device that achieves both high-accuracy sensing by a touch sensor unit and smooth input using the touch sensor unit is provided. The display device includes a display unit and the touch sensor unit. The touch sensor unit performs touch sensing operation at a different timing from display image rewriting by the display unit, whereby the high-accuracy sensing can be achieved. The display unit has a function of rewriting a display image only in a region that needs to be rewritten. In the case where the entire display region is not necessarily rewritten, the time for the sensing operation by the touch sensor unit can be lengthened, whereby the smooth input can be achieved.
    Type: Application
    Filed: May 2, 2023
    Publication date: September 21, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Susumu KAWASHIMA, Kouhei TOYOTAKA, Kei TAKAHASHI
  • Patent number: 11763766
    Abstract: A novel display panel that is highly convenient or reliable is provided. A pixel circuit includes a first switch, a node, a first capacitor, a second capacitor, and a second switch. The first switch includes a first terminal to which a first signal is supplied and a second terminal electrically connected to the node. The first capacitor includes a first terminal electrically connected to the node. The second capacitor includes a first terminal electrically connected to the node and a second terminal electrically connected to the second switch. The second switch includes a first terminal to which a second signal is supplied and a second terminal electrically connected to the second terminal of the second capacitor. In addition, the second switch has a function of changing from a non-conducting state to a conducting state when the first switch is in a non-conducting state and a function of changing from a conducting state to a non-conducting state when the first switch is in a non-conducting state.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: September 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kouhei Toyotaka, Kei Takahashi, Koji Kusunoki, Kazunori Watanabe, Susumu Kawashima
  • Patent number: 11733574
    Abstract: A liquid crystal display device with a high aperture ratio is provided. The display device includes a transistor, a first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer, a pixel electrode, a common electrode, and a liquid crystal layer in a pixel. The first insulating layer is positioned over a channel formation region of the transistor. The first conductive layer is positioned over the first insulating layer. The second insulating layer is positioned over the transistor, the first insulating layer, and the first conductive layer. The pixel electrode is positioned over the second insulating layer, the third insulating layer is positioned over the pixel electrode, the common electrode is positioned over the third insulating layer, and the liquid crystal layer is positioned over the common electrode. The common electrode includes a region overlapping with the first conductive layer with the pixel electrode positioned therebetween.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: August 22, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kouhei Toyotaka, Kazunori Watanabe, Susumu Kawashima, Kei Takahashi, Koji Kusunoki, Masataka Nakada, Ami Sato
  • Publication number: 20230260475
    Abstract: A display apparatus which includes a driver with low power consumption and in which an output voltage of the driver is boosted by a pixel is provided. The source driver in which a logic unit and an amplifier unit operate appropriately by the same low voltage is included, and the pixel has a function of retaining first data, a function of adding second data to the first data to generate third data, and a function of supplying the third data to a display device. Thus, even when a voltage output from the source driver is low, the voltage can be boosted by the pixel; accordingly, the display device can operate appropriately.
    Type: Application
    Filed: April 13, 2023
    Publication date: August 17, 2023
    Inventors: Kouhei TOYOTAKA, Motoharu SAITO
  • Patent number: 11715438
    Abstract: A display device that achieves both high-accuracy sensing by a touch sensor unit and smooth input using the touch sensor unit is provided. The display device includes a display unit and the touch sensor unit. The touch sensor unit performs touch sensing operation at a different timing from display image rewriting by the display unit, whereby the high-accuracy sensing can be achieved. The display unit has a function of rewriting a display image only in a region that needs to be rewritten. In the case where the entire display region is not necessarily rewritten, the time for the sensing operation by the touch sensor unit can be lengthened, whereby the smooth input can be achieved.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: August 1, 2023
    Inventors: Susumu Kawashima, Kouhei Toyotaka, Kei Takahashi
  • Patent number: 11694648
    Abstract: A display device capable of performing image processing is provided. A memory node is provided in each pixel included in the display device. An intended correction data is held in the memory node. The correction data is calculated by an external device and written into each pixel. The correction data is added to image data by capacitive coupling, and the resulting data is supplied to a display element. Thus, the display element can display a corrected image. The correction enables image upconversion, for example.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: July 4, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Susumu Kawashima, Koji Kusunoki, Kazunori Watanabe, Kouhei Toyotaka, Naoto Kusumoto, Shunpei Yamazaki
  • Patent number: 11676555
    Abstract: A display device that achieves both high-accuracy sensing by a touch sensor unit and smooth input using the touch sensor unit is provided. The display device includes a display unit and the touch sensor unit. The touch sensor unit performs touch sensing operation at a different timing from display image rewriting by the display unit, whereby the high-accuracy sensing can be achieved. The display unit has a function of rewriting a display image only in a region that needs to be rewritten. In the case where the entire display region is not necessarily rewritten, the time for the sensing operation by the touch sensor unit can be lengthened, whereby the smooth input can be achieved.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: June 13, 2023
    Inventors: Susumu Kawashima, Kouhei Toyotaka, Kei Takahashi
  • Publication number: 20230176433
    Abstract: Display data of pixels is updated at different timings. A scan line is connected to a first pixel and a second pixel, a first wiring is connected to the first pixel, and a second wiring is connected to the second pixel. In a first period, a signal for selecting the first pixel and the second pixel is supplied to the scan line. Setting data for setting a state where the display data of the first pixel is updated is supplied to the first wiring, and setting data for setting a state where the display data of the second pixel is updated is supplied to the second wiring. In a second period, a signal for selecting the first pixel and the second pixel is supplied to the scan line. Setting data for setting a state where the display data of the first pixel is not updated is supplied to the first wiring, and the setting data for setting the state where the display data of the second pixel is updated is supplied to the second wiring.
    Type: Application
    Filed: March 19, 2019
    Publication date: June 8, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Kouhei TOYOTAKA, Satoshi YOSHIMOTO, Kazunori WATANABE, Susumu KAWASHIMA, Kei TAKAHASHI
  • Patent number: 11663990
    Abstract: A display apparatus which includes a driver with low power consumption and in which an output voltage of the driver is boosted by a pixel is provided. The source driver in which a logic unit and an amplifier unit operate appropriately by the same low voltage is included, and the pixel has a function of retaining first data, a function of adding second data to the first data to generate third data, and a function of supplying the third data to a display device. Thus, even when a voltage output from the source driver is low, the voltage can be boosted by the pixel; accordingly, the display device can operate appropriately.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: May 30, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kouhei Toyotaka, Motoharu Saito
  • Publication number: 20230155199
    Abstract: A power storage system with excellent characteristics is provided. A power storage system with a high degree of safety is provided. A power storage system with less deterioration is provided. A storage battery with excellent characteristics is provided. The power storage system includes a neural network and a storage battery. The neural network includes an input layer, an output layer, and one or more hidden layers between the input layer and the output layer. The predetermined hidden layer is connected to the previous hidden layer or the previous input layer by a predetermined weight coefficient, and connected to the next hidden layer or the next output layer by a predetermined weight coefficient. In the storage battery, voltage and time at which the voltage is obtained are measured as one of sets of data. The sets of data measured at different times are input to the input layer and the operational condition of the storage battery is changed in accordance with a signal output from the output layer.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 18, 2023
    Inventors: Kazutaka KURIKI, Ryota TAJIMA, Kouhei TOYOTAKA, Hideaki SHISHIDO, Toshiyuki ISA
  • Publication number: 20230154369
    Abstract: A flip-flop circuit is provided. A driver circuit is provided. The flip-flop circuit includes first to fifth input terminals and first to third output terminals, the first input terminal is supplied with a first trigger signal, the second input terminal is supplied with a second trigger signal, the third input terminal is supplied with a batch selection signal, the fourth input terminal is supplied with a first pulse width modulation signal, and the fifth input terminal is supplied with a second pulse width modulation signal.
    Type: Application
    Filed: January 12, 2023
    Publication date: May 18, 2023
    Inventors: Kouhei TOYOTAKA, Kazunori WATANABE, Susumu KAWASHIMA, Daisuke KUBOTA, Tetsuji ISHITANI, Akio YAMASHITA
  • Patent number: 11645992
    Abstract: A display device in which high voltage can be applied to a display element is provided. A display element includes a pixel provided with a display element including a pixel electrode and a common electrode, and the pixel is electrically connected to a first data line and a second data line. Supply of a first potential to the pixel through the first data line and supply of a second potential to the pixel through the second data line are performed concurrently, and then a third potential is supplied to the pixel through the second data line, whereby the first potential held in the pixel is changed to a fourth potential, and the fourth potential is applied to the pixel electrode. Here, the second potential is a potential calculated based on the first potential. When the value of the second potential is less than or equal to a potential applied to the common electrode, the third potential is higher than the potential applied to the common electrode.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: May 9, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kouhei Toyotaka, Shigeru Onoya, Marina Hiyama