Patents by Inventor Kouichi Kotera
Kouichi Kotera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220192938Abstract: A method for dyeing hair in a variety of colors in shortened time using a plant dye or natural hair dye friendly to hair and skin without using a diamine-based dye or the like. The method includes applying a dye to hair, keeping the hair with applied dye on it for a while, rinsing the dye residue out, applying a color-enhancing agent and rinsing this agent out and washing the hair with an oxidative coloring shampoo. The dye includes a colorant for plant dyeing such as henna or indigo, a lotion containing polyhydric phenol, a sweating promoter, and sodium bromate. The color enhancing agent contains ferrous ion and bentonite. The oxidative coloring shampoo contains brown sugar, trehalose, potash soap, and sodium bromate.Type: ApplicationFiled: August 5, 2020Publication date: June 23, 2022Inventor: Kouichi KOTERA
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Patent number: 8766965Abstract: A drive circuit of a display device includes decoder circuit which outputs a voltage based on a 8-bit digital value. The decoder circuit includes a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit.Type: GrantFiled: June 19, 2013Date of Patent: July 1, 2014Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Kenichi Akiyama, Yoshihiro Kotani, Hiroko Sehata, Kouichi Kotera
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Patent number: 8605025Abstract: The present invention relates to enhancing low power consumption of a display device having a SRAM. The display device includes a drive circuit receiving video data; video lines connected the drive circuit; and pixels connected to the video signals. The drive circuit includes a memory storing the video data in memory cells. Each memory cell includes a first inverter with input and output terminals connected to first and second nodes, respectively. A second inverter has output and input terminals connected to the first and second nodes, respectively. A First and second transistors between a first data line and the first node each have a control terminal connected to a first word line or a third word line, respectively. Third and fourth transistors between a second data line and the second node each have a control terminal connected to a second word line or a fourth word line, respectively.Type: GrantFiled: May 20, 2011Date of Patent: December 10, 2013Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Yoshinori Aoki, Mitsuru Goto, Shouji Nagao, Kouichi Kotera
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Patent number: 8576214Abstract: A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.Type: GrantFiled: February 19, 2010Date of Patent: November 5, 2013Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Hiroko Sehata, Kouichi Kotera, Yoshihiro Kotani, Shuuichirou Matsumoto
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Publication number: 20130278579Abstract: A drive circuit of a display device includes decoder circuit which outputs a voltage based on a 8-bit digital value. The decoder circuit includes a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit.Type: ApplicationFiled: June 19, 2013Publication date: October 24, 2013Inventors: Kenichi Akiyama, Yoshihiro Kotani, Hiroko Sehata, Kouichi Kotera
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Patent number: 8477131Abstract: A decoder circuit which outputs a voltage based on a 8-bit digital value includes: a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit. Due to such a constitution, it is possible to reduce a circuit scale of the decoder circuit which outputs the voltage corresponding to the 8-bit digital value.Type: GrantFiled: June 29, 2010Date of Patent: July 2, 2013Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Kenichi Akiyama, Yoshihiro Kotani, Hiroko Sehata, Kouichi Kotera
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Patent number: 8094104Abstract: A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.Type: GrantFiled: August 3, 2007Date of Patent: January 10, 2012Assignees: Hitachi ULSI Systems Co., Ltd., Renesas Electronics CorporationInventors: Arata Kinjo, Kazuo Ookado, Kouichi Kotera, Hitoshi Oda, Masuhiro Endo
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Publication number: 20110292016Abstract: The present invention relates to enhancing low power consumption of a display device having a SRAM. The display device includes a drive circuit receiving video data; video lines connected the drive circuit; and pixels connected to the video signals. The drive circuit includes a memory storing the video data in memory cells. Each memory cell includes a first inverter with input and output terminals connected to first and second nodes, respectively. A second inverter has output and input terminals connected to the first and second nodes, respectively. A First and second transistors between a first data line and the first node each have a control terminal connected to a first word line or a third word line, respectively. Third and fourth transistors between a second data line and the second node each have a control terminal connected to a second word line or a fourth word line, respectively.Type: ApplicationFiled: May 20, 2011Publication date: December 1, 2011Inventors: Yoshinori Aoki, Mitsuru Goto, Shouji Nagao, Kouichi Kotera
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Patent number: 7969400Abstract: A display device includes a drive circuit to which video data is supplied from the outside; video lines to which video signals outputted from the drive circuit are supplied; and pixels to which the video signals are supplied through the video lines. The drive circuit includes a static random access memory which stores the video data in memory cells. The drive circuit is configured to perform writing only on selected memory cells that are connected to shared writing and reading word lines, to drive other memory cells connected to the shared writing and reading word lines and not selected to perform writing to output video data respectively stored therein to a reading data line, and then to rewrite the video data back to the non-selected memory cells, without precharging the memory cells that are connected to shared writing and reading word lines.Type: GrantFiled: February 22, 2005Date of Patent: June 28, 2011Assignee: Hitachi Displays, Ltd.Inventors: Yoshinori Aoki, Mitsuru Goto, Shouji Nagao, Kouichi Kotera
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Publication number: 20110122118Abstract: To obtain a display device that can perform measurements in a wider range and detect characteristic changes with high accuracy while suppressing the increase in circuit size. The display device includes display elements and a characteristic testing unit that tests characteristics of the display elements, and the characteristic testing unit includes a current supply unit for the display element as a target of test, a reference voltage output unit, an output voltage detecting unit that detects a code of a voltage of the test target display element relative to the reference voltage at each time, and a test control unit that allows the reference voltage output unit to sequentially output the reference voltages in response to the codes and acquires a measurement result of the voltage of the test target display element based on the codes.Type: ApplicationFiled: November 22, 2010Publication date: May 26, 2011Inventors: Yoshihiro Kotani, Takeshi Shibata, Gou Yamamoto, Kouichi Kotera, Masato Ishii, Norio Mamba
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Publication number: 20100328292Abstract: A decoder circuit which outputs a voltage based on a 8-bit digital value includes: a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit. Due to such a constitution, it is possible to reduce a circuit scale of the decoder circuit which outputs the voltage corresponding to the 8-bit digital value.Type: ApplicationFiled: June 29, 2010Publication date: December 30, 2010Inventors: Kenichi AKIYAMA, Yoshihiro Kotani, Hiroko Sehata, Kouichi Kotera
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Publication number: 20100238153Abstract: A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.Type: ApplicationFiled: February 19, 2010Publication date: September 23, 2010Inventors: Hiroko SEHATA, Kouichi Kotera, Yoshihiro Kotani, Shuuichirou Matsumoto
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Patent number: 7737929Abstract: A display device which transmits display data to drive circuits which drive a display panel using low voltage differential signals have input circuits which are hardly influenced by noise. To transmit the low voltage differential signals under the same condition, low voltage differential signal lines are formed in a zigzag pattern so as to make the lengths of the lines equal. To reduce the influence generated by the overlapping of the zigzagged low voltage differential signal lines and the drive circuits, level shift circuits are provided to the input circuits so as to make the input signals assume a stable operation level.Type: GrantFiled: April 7, 2004Date of Patent: June 15, 2010Assignee: Hitachi Displays, Ltd.Inventors: Shigeru Itou, Shuuichirou Matsumoto, Yukihide Ode, Hidetoshi Kida, Kouichi Kotera, Gou Yamamoto
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Patent number: 7405732Abstract: A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.Type: GrantFiled: October 25, 2001Date of Patent: July 29, 2008Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.Inventors: Arata Kinjo, Kazuo Ookado, Kouichi Kotera, Hitoshi Oda, Masuhiro Endo
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Publication number: 20070279404Abstract: A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.Type: ApplicationFiled: August 3, 2007Publication date: December 6, 2007Inventors: Arata Kinjo, Kazuo Ookado, Kouichi Kotera, Hitoshi Oda, Masuhiro Endo
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Publication number: 20070279357Abstract: A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.Type: ApplicationFiled: August 3, 2007Publication date: December 6, 2007Inventors: Arata Kinjo, Kazuo Ookado, Kouichi Kotera, Hitoshi Oda, Masuhiro Endo
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Publication number: 20070279358Abstract: A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.Type: ApplicationFiled: August 3, 2007Publication date: December 6, 2007Inventors: Arata Kinjo, Kazuo Ookado, Kouichi Kotera, Hitoshi Oda, Masuhiro Endo
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Publication number: 20050185477Abstract: The present invention aims at, as one object, the further enhancement of the low power consumption of a display device having a SRAM. According to the present invention, a display device includes a drive circuit to which video data is supplied from the outside; video lines to which video signals outputted from the drive circuit are supplied; and pixels to which the video signals are supplied through the video lines. The drive circuit includes a memory which stores the video data in memory cells.Type: ApplicationFiled: February 22, 2005Publication date: August 25, 2005Inventors: Yoshinori Aoki, Mitsuru Goto, Shouji Nagao, Kouichi Kotera
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Publication number: 20050146493Abstract: A liquid crystal drive device having a differential-type input circuit including a differential amplification stage for receiving a differential signal and a buffer stage for generating an output signal on the basis of an output of the differential amplification stage, the liquid crystal drive device for receiving a signal of display data via the input circuit and outputting a signal for driving a liquid crystal panel on the basis of the display data, wherein a liquid crystal driving voltage VLCD larger than a power supply voltage VCC for logic to be supplied to the operation voltage buffer stage is supplied to the differential amplification stage of the input circuit. A standby function of interrupting an operation current of the differential amplification stage in a period where no display data is received is provided.Type: ApplicationFiled: October 25, 2001Publication date: July 7, 2005Inventors: Arata Kinjo, Kazuo Ookado, Kouichi Kotera, Hitoshi Oda, Masuhiro Endo
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Publication number: 20040212578Abstract: A display device which transmits display data to drive circuits which drive a display panel using low voltage differential signals have input circuits which are hardly influenced by noise. To transmit the low voltage differential signals under the same condition, low voltage differential signal lines are formed in a zigzag pattern so as to make the lengths of the lines equal. To reduce the influence generated by the overlapping of the zigzagged low voltage differential signal lines and the drive circuits, level shift circuits are provided to the input circuits so as to make the input signals assume a stable operation level.Type: ApplicationFiled: April 7, 2004Publication date: October 28, 2004Inventors: Shigeru Itou, Shuuichirou Matsumoto, Yukihide Ode, Hidetoshi Kida, Kouichi Kotera, Gou Yamamoto