Patents by Inventor Kouichi Seki

Kouichi Seki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220245254
    Abstract: A control apparatus for a vehicle includes a processor, a storage, and a first determining unit. The processor is configured to control a control target mounted in the vehicle. The storage is configured to contain unauthorized entry data. The unauthorized entry data indicates a presence of an unauthorized entry into the vehicle. The first determining unit is configured to make a determination on a necessity of a secure boot process upon activation of the processor, on the basis of the unauthorized entry data.
    Type: Application
    Filed: January 19, 2022
    Publication date: August 4, 2022
    Inventors: Hironori OOSHIMA, Hisataro IINAMI, Kouichi SEKI
  • Patent number: 6288941
    Abstract: An electrically erasable semiconductor nonvolatile memory device has an array of memory cells arranged in rows and columns and one or more information erasure signal generating circuits. Each of the memory cells of the memory cell array includes a field-effect transistor element having a control gate connected with a word line conductor extending in a direction of the rows, a floating gate where carriers may be accumulated, a drain connected with a data line conductor extending in the direction of the columns and a source connected with a source conductor. The memory cell array may be divided into a plurality of memory blocks so as to have boundaries in the row direction or in the column direction, with the source conductors arranged in the row direction or in the column direction. Information erasure signals may be supplied to the source conductors or data line conductors with a time delay therebetween.
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: September 11, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Kouichi Seki, Toshihiro Tanaka, Hitoshi Kume, Takeshi Wada, Tadashi Muto
  • Patent number: 6286354
    Abstract: The work rolls of two sets of roller groups are held within one-piece metal chock in a rolling mill. A one-piece metal chock in which the driving side and operating side are separate then provides support at the upper part of the rolling material, with support similarly being provided at the lower part using another pair of single piece metal chocks. Two sets of roll groups can then be arranged close to each other, strip walking and strip curving can be prevented, and a rolling mill, rolling method and rolling installation that are easy to maintain and provide superior rolling efficiency can be provided.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: September 11, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Kajiwara, Yoshihiko Iida, Yasutsugu Yoshimura, Kouichi Seki, Ryohei Konose, Mitsuo Nihei
  • Patent number: 5914697
    Abstract: A portable radio device helical antenna 1 is fabricated by a method wherein the cutting boss component 6 of a molded element 7, that has a spirally cut groove 4 formed around an insulator and that has a mounting component 3 at one end and the boss component 6 at the other end, is chucked, the components are metal plated, the metal layer is then removed except from the groove 4 and mounting component 3, the boss component 6 is then cut off and that location is machined, and a radio device base plate fixing hole 9 is formed in the mounting component 3. The mounting component 3 is then mounted on the base plate of a radio device main body.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: June 22, 1999
    Assignee: Nippon Antena Kabushiki Kaisha
    Inventor: Kouichi Seki
  • Patent number: 5371023
    Abstract: A novel gate circuit is disclosed. A first semiconductor switch includes a couple of main terminals connected between a first potential level and an output node, in which a high impedance state is held in response to an input signal having a first logic level and a second logic level, and the impedance state changes from high to low only during a transient period when the input signal changes substantially from the first to second logic level. A second semiconductor switch includes a couple of main terminals inserted between a second potential level different from the first potential level and the output node, in which a high impedance state is held in response to the input signal, and the impedance state changes from high to low only during a transient period when the input signal changes from the second to first logic level.
    Type: Grant
    Filed: June 9, 1992
    Date of Patent: December 6, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Masataka Minami, Mitsuru Hiraki, Kazuo Yano, Atsuo Watanabe, Kouichi Seki, Takahiro Nagano, Kazushige Sato, Keiichi Yoshizumi, Ryuichi Izawa
  • Patent number: 4618873
    Abstract: In a thin film device having a hydrogenated amorphous silicon film, a metal layer is formed on the hydrogenated amorphous silicon film and then the metal layer is removed. A resulting reaction layer formed on the hydrogenated amorphous silicon film is used as a resistor.
    Type: Grant
    Filed: June 18, 1984
    Date of Patent: October 21, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Akira Sasano, Kouichi Seki, Hideaki Yamamoto, Toru Baji, Toshihisa Tsukada