Patents by Inventor Kouji Arai
Kouji Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10005149Abstract: An economical capacitor-type welding device and capacitor-type welding method that have a small power loss, that can be made compact, and that reliably control a charging circuit without being affected by the inductance of a charging path. In an exemplary capacitor-type welding device and an exemplary capacitor-type welding method of the invention, a bypass switching element having a forward-blocking function is connected in parallel to output terminals of a charging circuit, and the bypass switching element is brought into a conduction state to allow a backflow current, which is caused to flow by a magnetic energy stored in the inductance of a primary winding or an inductor included in the charging path, to bypass the charging circuit. A discharge switching element is brought into a conduction state after the bypass switching element enters the non-conduction state and recovers the forward-blocking function.Type: GrantFiled: January 24, 2013Date of Patent: June 26, 2018Assignee: ORIGIN ELECTRIC COMPANY, LIMITEDInventors: Kouji Arai, Yasuo Kadoya, Akio Komatsu
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Patent number: 9434021Abstract: The capacitive welder includes a charging circuit, a welding transformer, a capacitor, a discharging switching element connected in parallel with a primary winding of the welding transformer and the capacitor that are connected in series, a bypass switching element connected in parallel with the primary winding, welding electrodes connected in parallel with a secondary winding of the welding transformer, and a control circuit for bringing the welding transformer into a reset allowing state by allowing a reset current to flow in the primary winding using the input power introduced through the charging circuit without supplying an ON signal to the bypass switching element, and then supplying the ON signal to the bypass switching element such that the capacitor is charged through the bypass switching element by the input power introduced through the charging circuit.Type: GrantFiled: January 10, 2013Date of Patent: September 6, 2016Assignee: ORIGIN ELECTRIC COMPANY, LIMITEDInventors: Yasuo Kadoya, Kouji Arai, Akio Komatsu
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Patent number: 9397242Abstract: The present invention addresses the problem of providing a novel silicon substrate having a textured surface by dry-etching the surface of a silicon substrate having (111) orientation and thereby forming a texture thereon. The present invention provides a silicon substrate having (111) orientation, said silicon substrate having a textured surface that includes multiple protrusions which each comprise three slant faces and have heights of 100 to 8000 nm. This process for producing a silicon substrate includes: a step of preparing a silicon substrate having (111) orientation; and a step of blowing an etching gas onto the surface of the silicon substrate, said etching gas containing one or more gases selected from the group consisting of ClF3, XeF2, BrF3, BrF5 and NF3.Type: GrantFiled: March 28, 2012Date of Patent: July 19, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yasushi Taniguchi, Shigeru Sankawa, Sr., Kouji Arai, Hiroshi Tanabe, Ichiro Nakayama, Naoshi Yamaguchi
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Publication number: 20150059819Abstract: In a solar power generation device concentrating solar light to solar cells by a reflecting mirror and converting solar energy into electric energy, a cooling pipe is arranged above the reflecting mirror, a thermoelectric conversion element is mounted on at least one side surface of the cooling pipe and a solar cell is mounted on an upper surface of the thermoelectric conversion element.Type: ApplicationFiled: August 25, 2014Publication date: March 5, 2015Inventors: TSUYOSHI NOMURA, MASANORI MINAMIO, KOUJI ARAI, KENICHIRO MASE
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Publication number: 20150015212Abstract: The capacitive welder includes a charging circuit, a welding transformer, a capacitor, a discharging switching element connected in parallel with a primary winding of the welding transformer and the capacitor that are connected in series, a bypass switching element connected in parallel with the primary winding, welding electrodes connected in parallel with a secondary winding of the welding transformer, and a control circuit for bringing the welding transformer into a reset allowing state by allowing a reset current to flow in the primary winding using the input power introduced through the charging circuit without supplying an ON signal to the bypass switching element, and then supplying the ON signal to the bypass switching element such that the capacitor is charged through the bypass switching element by the input power introduced through the charging circuit.Type: ApplicationFiled: January 10, 2013Publication date: January 15, 2015Applicant: ORIGIN ELECTRIC COMPANY, LIMITEDInventors: Yasuo Kadoya, Kouji Arai, Akio Komatsu
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Publication number: 20140374389Abstract: An economical capacitor-type welding device and capacitor-type welding method that have a small power loss, that can be made compact, and that reliably control a charging circuit without being affected by the inductance of a charging path. In an exemplary capacitor-type welding device and an exemplary capacitor-type welding method of the invention, a bypass switching element having a forward-blocking function is connected in parallel to output terminals of a charging circuit, and the bypass switching element is brought into a conduction state to allow a backflow current, which is caused to flow by a magnetic energy stored in the inductance of a primary winding or an inductor included in the charging path, to bypass the charging circuit. A discharge switching element is brought into a conduction state after the bypass switching element enters the non-conduction state and recovers the forward-blocking function.Type: ApplicationFiled: January 24, 2014Publication date: December 25, 2014Applicant: ORIGIN ELECTRIC COMPANY, LIMITEDInventors: Kouji Arai, Yasuo Kadoya, Akio Komatsu
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Publication number: 20140246092Abstract: A silicon substrate having a new shape on the opposite surface side of textures can be manufactured at low costs by performing high-quality washing to the silicon substrate with a substrate plane orientation (100) having a texture structure by using a gas etching method, thereby improving use efficiency of light. A silicon substrate is provided having the substrate plane orientation (100) with textures, in which fine rectangular-shaped unevenness is formed in a ripple shape on the opposite side surface of the texture-formed surface, and the depth of concave portions therein is 10 to 200 nm.Type: ApplicationFiled: February 27, 2014Publication date: September 4, 2014Applicant: Panasonic CorporationInventors: KOUJI ARAI, NAOSHI YAMAGUCHI, HIROSHI TANABE
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Publication number: 20140020750Abstract: The present invention addresses the problem of providing a novel silicon substrate having a textured surface by dry-etching the surface of a silicon substrate having (111) orientation and thereby forming a texture thereon. The present invention provides a silicon substrate having (111) orientation, said silicon substrate having a textured surface that includes multiple protrusions which each comprise three slant faces and have heights of 100 to 8000 nm. This process for producing a silicon substrate includes: a step of preparing a silicon substrate having (111) orientation; and a step of blowing an etching gas onto the surface of the silicon substrate, said etching gas containing one or more gases selected from the group consisting of ClF3, XeF2, BrF3, BrF5 and NF3.Type: ApplicationFiled: March 28, 2012Publication date: January 23, 2014Applicant: PANASONIC CORPORATIONInventors: Yasushi Taniguchi, Shigeru Sankawa, Kouji Arai, Hiroshi Tanabe, Ichiro Nakayama, Naoshi Yamaguchi
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Patent number: 8560631Abstract: When a logical volume in a first storage box is transferred to a second storage box, information of an access object such as a network communication protocol possessed by a host which communicates with the first storage box is changed to change a network route for accessing the transferred logical volume. Logical volume transfer is notified from the first storage box to the host by using an ICMP Redirection Error message or the ARP protocol.Type: GrantFiled: July 2, 2007Date of Patent: October 15, 2013Assignee: Hitachi, Ltd.Inventors: Takashige Iwamura, Yasutomo Yamamoto, Yoshiaki Eguchi, Hiroshi Arakawa, Kouji Arai
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Patent number: 8423825Abstract: The storage system is coupled to a computer and includes a plurality of physical storages being used to configure a first logical storage and a second logical storage, a control unit receiving a read request and a write request from the computer; and a cache memory storing data which is sent to the computer. The control unit determines whether a request from the computer is a write request or a read request. If it is a read request, the control unit reads data from the cache memory or at least one of the plurality of physical storages based on the read request. If it is a write request, the control unit determines whether destination of the write request is the first logical storage.Type: GrantFiled: May 25, 2011Date of Patent: April 16, 2013Assignee: Hitachi, Ltd.Inventors: Yoshiaki Eguchi, Kazuhiko Mogi, Yasutomo Yamamoto, Takashi Oeda, Kouji Arai
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Patent number: 8266375Abstract: The storage system provides a logical volume and includes a plurality of disk devices and a controller, coupled to the plurality of disk devices, which manages a plurality of storage areas provided by the plurality of disk devices. The host includes an application which sends data to a logical volume and an operating system which manages a block position of the logical volume. If the operating system receives a request from the application to expand a first capacity of the logical volume, the operating system sends a write request to the logical volume. In response to the write request, the controller allocates at least one of the plurality of storage areas to the logical volume. The controller monitors a second capacity of storage areas allocated to the logical volume relative to a third capacity of the plurality of storage areas.Type: GrantFiled: September 12, 2011Date of Patent: September 11, 2012Assignee: Hitachi, Ltd.Inventors: Yoshiki Kano, Manabu Kitamura, Kouji Arai
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Patent number: 8126846Abstract: According to the present invention, techniques for controlling copying of logical volumes within a computer storage system are provided. A representative embodiment includes a plurality of storage devices controlled by a control unit, one or more processors, and a buffer memory for temporarily storing data read from the storage devices within the control unit. The storage devices can be addressed as logical volumes.Type: GrantFiled: October 30, 2008Date of Patent: February 28, 2012Assignee: Hitachi, Ltd.Inventors: Kouji Arai, Susumu Suzuki, Hironori Yasukawa
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Publication number: 20120005427Abstract: The storage system provides a logical volume and includes a plurality of disk devices and a controller, coupled to the plurality of disk devices, which manages a plurality of storage areas provided by the plurality of disk devices. The host includes an application which sends data to a logical volume and an operating system which manages a block position of the logical volume. If the operating system receives a request from the application to expand a first capacity of the logical volume, the operating system sends a write request to the logical volume. In response to the write request, the controller allocates at least one of the plurality of storage areas to the logical volume. The controller monitors a second capacity of storage areas allocated to the logical volume relative to a third capacity of the plurality of storage areas.Type: ApplicationFiled: September 12, 2011Publication date: January 5, 2012Applicant: HITACHI, LTD.Inventors: Yoshiki Kano, Manabu Kitamura, Kouji Arai
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Patent number: 8068379Abstract: A plurality of sub word lines each have a length equivalent to the division of a main word line along the extension direction thereof, arranged along a bit line crossing said main word line, and are connected with a plurality of memory cells. A first sub word select line arranged in parallel to the main word line is extended to a plurality of sub arrays arranged in the extension direction of the word line. A second sub word select line is connected to the corresponding one of said first sub word select line to be extended orthogonally to a word line driving circuit area of an adjacent sub array. In the sub word line driving circuit provided for each sub array, a sub word line is selected and deselected by signals supplied from said main word line and said second sub word select line.Type: GrantFiled: March 31, 1998Date of Patent: November 29, 2011Assignees: Hitachi, Ltd., Texas Instruments Inc.Inventors: Tsutomu Takahashi, Kouji Arai, Yasushi Takahashi, Atsuya Tanaka, Shunichi Sukegawa, Shinji Bessho, Masayuki Hira
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Patent number: 8028127Abstract: A volume provider unit in a computer system that detects a logical block address of a read or write I/O accessing a logical volume of a storage device from a host. According to the logical block address fetched, a storage domain of the logical volume is dynamically expanded. Moreover, the storage domain of the logical volume is reduced or expanded according to an instruction of logical volume capacity reduction or expansion from a host commander part to a volume server.Type: GrantFiled: September 7, 2010Date of Patent: September 27, 2011Assignee: Hitachi, Ltd.Inventors: Yoshiki Kano, Manabu Kitamura, Kouji Arai
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Publication number: 20110225455Abstract: The storage system is coupled to a computer and includes a plurality of physical storages being used to configure a first logical storage and a second logical storage, a control unit receiving a read request and a write request from the computer; and a cache memory storing data which is sent to the computer. The control unit determines whether a request from the computer is a write request or a read request. If it is a read request, the control unit reads data from the cache memory or at least one of the plurality of physical storages based on the read request. If it is a write request, the control unit determines whether destination of the write request is the first logical storage.Type: ApplicationFiled: May 25, 2011Publication date: September 15, 2011Applicant: HITACHI, LTD.Inventors: Yoshiaki Eguchi, Kazuhiko Mogi, Yasutomo Yamamoto, Takashi Oeda, Kouji Arai
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Patent number: 7971097Abstract: A host and a storage system each keep a shared identifier indicating a state of a system. The storage system acquires, at update of data, a data pair including data for a change through processing of the host and data before the update. The storage system relates the data pair to a shared identifier. When the host indicates an identifier, the storage system restores data using the data pair.Type: GrantFiled: October 27, 2008Date of Patent: June 28, 2011Assignee: Hitachi, Ltd.Inventors: Yoshiaki Eguchi, Kazuhiko Mogi, Yasutomo Yamamoto, Takashi Oeda, Kouji Arai
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Patent number: 7953949Abstract: The present invention provides techniques, including a method and system, for relocating data between storage systems. In one embodiment of the present invention a host collects usage information from a plurality of storage systems, and determines the relocation destination LU for data stored in the LU to be relocated. The host alters an LU logical position name table that determines matching between the logical position names of data and LUs. It also carries out data relocation between storage subsystems by shifting data stored in an origin LU to be relocated to a destination LU. In another embodiment relocation of files is provided.Type: GrantFiled: July 17, 2007Date of Patent: May 31, 2011Assignee: Hitachi, Ltd.Inventors: Hiroshi Arakawa, Kazuhiko Mogi, Yoshiaki Eguchi, Kouji Arai
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Patent number: 7937513Abstract: A method for controlling a storage system including a host computer, and a first and a second storage control apparatuses each receiving a data input/output request from the host computer and executing a data input/output process for a storage device in response to the request, comprises connecting a first communication path between the host computer and the first apparatus; connecting a second communication path between the first apparatus and the second apparatus; receiving by the first apparatus a first data input/output request from the host computer through the first path; when the first apparatus has judged that the first request is not for the first apparatus, transmitting by the first apparatus a second data input/output request corresponding to the first request, to the second apparatus through the second path; and by the second apparatus, receiving the second request and executing a data input/output process corresponding to the second request received.Type: GrantFiled: October 27, 2008Date of Patent: May 3, 2011Assignee: Hitachi, Ltd.Inventors: Hiroshi Ohno, Kouji Arai, Toshio Nakano, Hideo Tabuchi, Akinobu Shimada, Ai Satoyama, Yasutomo Yamamoto, Yoshiaki Eguchi
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Patent number: 7930474Abstract: A volume provider unit in a computer system that detects a logical block address of a read or write I/O accessing a logical volume of a storage device from a host. According to the logical block address fetched, a storage domain of the logical volume is dynamically expanded. Moreover, the storage domain of the logical volume is reduced or expanded according to an instruction of logical volume capacity reduction or expansion from a host commander part to a volume server.Type: GrantFiled: October 3, 2008Date of Patent: April 19, 2011Assignee: Hitachi, Ltd.Inventors: Yoshiki Kano, Manabu Kitamura, Kouji Arai