Abstract: A semiconductor apparatus includes: a substrate; a first semiconductor layer of a nitride semiconductor disposed over the substrate; a second semiconductor layer of a nitride semiconductor disposed over the first semiconductor layer; an insulating film disposed over the second semiconductor layer; a source electrode and a drain electrode that are disposed over the second semiconductor layer; and a gate electrode. The gate electrode includes: a Schottky region disposed over the second semiconductor layer, and a gate field-plate region disposed over the insulating film in the vicinity of the Schottky region, wherein the gate electrode includes a first gate electrode section disposed in the gate field-plate region so as to face the drain electrode, and a second gate electrode section disposed in the Schottky region, and wherein a material constituting the first gate electrode section has a lower work function than a material constituting the second gate electrode section.

Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.

Abstract: A semiconductor device includes a substrate, a first semiconductor layer formed over the substrate, the first semiconductor layer being composed of a nitride semiconductor, a second semiconductor layer formed over the first semiconductor layer, the second semiconductor layer being composed of a nitride semiconductor and a gate electrode, a source electrode, and a drain electrode that are formed over the second semiconductor layer, wherein the source electrode including a plurality of protrusions that penetrate into the second semiconductor layer, and the protrusions having a side surface inclined with respect to a surface of the first semiconductor layer.

Abstract: A semiconductor device includes: a first semiconductor layer formed, on a substrate, of a nitride semiconductor; a second semiconductor layer formed, on the first semiconductor layer, of a nitride semiconductor; a source electrode formed on the second semiconductor layer; a drain electrode formed on the second semiconductor layer; a metal oxide film formed, between the source electrode and the drain electrode, on the second semiconductor layer; and a gate electrode formed on the metal oxide film. The metal oxide film includes AlOx and InOx. AlOx/InOx in the metal oxide film is greater than or equal to 3.

Abstract: A nitride semiconductor device includes a first nitride semiconductor layer; a back-barrier layer that contains InGaN provided on the first nitride semiconductor layer; and a second nitride semiconductor layer that is provided on the back-barrier layer, wherein, in the back-barrier layer, in a thickness direction, an In composition increases at a first interface with the first nitride semiconductor layer, and the In composition is continuously reduced toward a second interface with the second nitride semiconductor layer.

Abstract: A compound semiconductor device includes: a compound semiconductor area in which a compound semiconductor plug is embedded and formed; and an ohmic electrode provided on the compound semiconductor plug, wherein the compound semiconductor plug includes, in a side surface portion that is as an interface with the compound semiconductor area, a high concentration dopant layer containing a dopant whose concentration is higher than that of other portions.

Abstract: A compound semiconductor device includes: a compound semiconductor area including, at an upper most portion, a protective layer made of a compound semiconductor; and an ohmic electrode provided on the compound semiconductor area, the ohmic electrode being away from the protective layer in plan view and being not in contact with the protective layer.

Abstract: A semiconductor device includes a nitride semiconductor stacked structure that includes a channel layer containing GaN and a barrier layer containing In and further includes a cap layer that contains GaN on the outermost surface but does not contain Al. The cap layer has a Ga/N ratio that varies along a thicknesswise direction.

Abstract: A semiconductor device includes: a first semiconductor layer formed, on a substrate, of a nitride semiconductor; a second semiconductor layer formed, on the first semiconductor layer, of a nitride semiconductor; a source electrode formed on the second semiconductor layer; a drain electrode formed on the second semiconductor layer; a metal oxide film formed, between the source electrode and the drain electrode, on the second semiconductor layer; and a gate electrode formed on the metal oxide film. The metal oxide film includes AlOx and InOx. AlOx/InOx in the metal oxide film is greater than or equal to 3.

Abstract: A semiconductor apparatus includes an electron transit layer formed of a nitride semiconductor over a substrate; an electron supply layer formed of a nitride semiconductor including In over the electron transit layer; a cap layer formed of a nitride semiconductor over the electron supply layer; an insulation film formed over the cap layer; a source electrode and a drain electrode formed over the electron transit layer or the electron supply layer; and a gate electrode formed over the cap layer. A quantum well is formed by the cap layer.

Abstract: A semiconductor device includes a buffer layer, a channel layer, and a carrier supply layer; first and second recesses formed in the channel layer and the carrier supply layer, to reach the buffer layer; first and second nitride semiconductor layers in the first and second recess, respectively; a source electrode over the first nitride semiconductor layer; a drain electrode over the second nitride semiconductor layer; and a gate electrode over the carrier supply layer between the first and second recesses. Each of the first and second nitride semiconductor layers includes first and second regions containing donors. An interface between the first and second regions is positioned deeper than two-dimensional electron gas on a surface side of the channel layer, and energy at a bottom of a conduction band of the second region is higher than energy at a bottom of a conduction band of the first region.

Abstract: A compound semiconductor device disclosed herein includes a substrate, an electron transit layer formed on the substrate, a compound semiconductor layer containing gallium and formed on the electron transit layer, a diffusion preventing layer containing gallium oxide and formed on the compound semiconductor layer, an insulation layer formed on the diffusion preventing layer, and a source electrode, a drain electrode, and a gate electrode formed over the electron transit layer at a distance from one another.

Abstract: A compound semiconductor device disclosed herein includes: a GaN carrier transit layer formed on a substrate; a barrier layer formed on the carrier transit layer; a first recess and a second recess formed in the barrier layer; a first InAlN layer and a second InAlN layer formed in the first recess and the second recess respectively, a composition ratio of In in the InAlN layers being equal to or more than 17% and equal to or less than 18%; a source electrode formed on the first InAlN layer; a drain electrode formed on the second InAlN layer; and a gate electrode formed on the barrier layer.

Abstract: A compound semiconductor device includes a first compound semiconductor layer containing a p-type impurity, a second compound semiconductor layer disposed over the first compound semiconductor layer and containing InGaN, an electron transit layer disposed over the second compound semiconductor layer, and an electron supply layer disposed over the electron transit layer.

Abstract: A semiconductor device includes a buffer layer, a channel layer, and a carrier supply layer; first and second recesses formed in the channel layer and the carrier supply layer, to reach the buffer layer; first and second nitride semiconductor layers in the first and second recess, respectively; a source electrode over the first nitride semiconductor layer; a drain electrode over the second nitride semiconductor layer; and a gate electrode over the carrier supply layer between the first and second recesses. Each of the first and second nitride semiconductor layers includes first and second regions containing donors. An interface between the first and second regions is positioned deeper than two-dimensional electron gas on a surface side of the channel layer, and energy at a bottom of a conduction band of the second region is higher than energy at a bottom of a conduction band of the first region.

Abstract: A semiconductor device includes a semiconductor stacked structure in which a semiconductor layer including an electron supply layer and an electron transit layer is stacked, and a gate electrode contacting with the semiconductor layer included in the semiconductor stacked structure or an insulating layer. The portion of the gate electrode contacting with the semiconductor layer or the insulating layer is an oxide of a metal configuring the portion of the gate electrode contacting with the semiconductor layer or the insulating layer.

Abstract: A compound semiconductor device disclosed herein includes: a substrate; an electron transit layer formed on the substrate and made of nitride semiconductor doped with an impurity that forms a trap level; a barrier layer formed on the electron transit layer; and a source electrode, a drain electrode, and a gate electrode formed over the electron transit layer at a distance from one another, wherein the electron transit layer includes: a first conductivity type region; a second conductivity type region located over the first conductivity region, where the second conductivity type region having an electron concentration higher than an electron concentration of the first conductivity type region; and a third conductivity type region located over the second conductivity type region, where the third conductivity type region having an electron concentration lower than a concentration of the impurity and being in contact with an upper surface of the electron transit layer.

Abstract: A semiconductor device includes a first semiconductor layer made of a nitride semiconductor and formed on a substrate, a second semiconductor layer made of a material including InAlN and formed on the first semiconductor layer, an insulator layer formed by an oxidized surface part of the second semiconductor layer, a gate electrode formed on the insulator layer, and a source electrode and a drain electrode respectively formed on the first or second semiconductor layer.

Abstract: A compound semiconductor device disclosed herein includes: a GaN carrier transit layer formed on a substrate; a barrier layer formed on the carrier transit layer; a first recess and a second recess formed in the barrier layer; a first InAlN layer and a second InAlN layer formed in the first recess and the second recess respectively, a composition ratio of In in the InAlN layers being equal to or more than 17% and equal to or less than 18%; a source electrode formed on the first InAlN layer; a drain electrode formed on the second InAlN layer; and a gate electrode formed on the barrier layer.

Abstract: A semiconductor device includes a semiconductor stacked structure in which a semiconductor layer including an electron supply layer and an electron transit layer is stacked, and a gate electrode contacting with the semiconductor layer included in the semiconductor stacked structure or an insulating layer. The portion of the gate electrode contacting with the semiconductor layer or the insulating layer is an oxide of a metal configuring the portion of the gate electrode contacting with the semiconductor layer or the insulating layer.