Patents by Inventor Kozo Nuriya

Kozo Nuriya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5940783
    Abstract: A microprocessor includes an assign function for assigning ports to a mode identifying unit, test signal input unit, and test result signal output unit, a test implement function for sending test results to the test result signal output unit according to the test data signals input from the test signal input unit, and an activation control function for activating the test implement function upon identifying a test mode by the status of the mode identifying unit. When a test mode signal from test equipment is received at the test mode identifying unit assigned to one port of the microprocessor, the test signal input unit and the test result signal output unit are assigned to other ports of the microprocessor, and when the test data signals from the test equipment are received at the test data signal input unit, test result signals according the test data signals are output from the test result signal output unit.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: August 17, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Kukutsu, Kozo Nuriya, Takao Ohkawara, Junji Soga, Tadashi Yoshino
  • Patent number: 5068661
    Abstract: A noise shaping quantization D/A converter in which an input digital signal is supplied to a single-integration sigma delta modulation circuit having quantization levels which include zero level, with a quantization error signal from the single-integration circuit being supplied to a double-integration noise shaping quantization circuit having quantization levels which also include zero level, and an output signal from the double-integration circuit being differentiated and summed with the single-integration circuit output to obtain a bit-compressed digital signal for D/A conversion. Offset of the analog output signal during a zero hold status of the input digital signal is eliminated, and increased efficiency of supply voltage utilization is attained, together with increased S/N ratio.
    Type: Grant
    Filed: September 13, 1988
    Date of Patent: November 26, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuhiko Kaneaki, Kozo Nuriya, Yasunori Tani
  • Patent number: 5006851
    Abstract: A first analog input signal is converted into a plurality of second analog signals having different levels respectively. The second analog signals are inputted into respective analog-to-digital converters. Values of output signals from the respective converters are adjusted in accordance with the values of the output signals from the respective converters to convert the output signals from the respective converters into respective adjusted signals. One of the adjusted signals is selected in accordance with the values of the output signals from the respective converters. The selected signal is produced as a system output signal.
    Type: Grant
    Filed: July 17, 1989
    Date of Patent: April 9, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuhiko Kaneaki, Mikio Oda, Kozo Nuriya, Yasunori Tani