Patents by Inventor Kramadhati V. Ravi
Kramadhati V. Ravi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170141720Abstract: Photovoltaic modules including a plurality of solar cells bonded to a module back sheet are described herein, wherein each solar cell includes a superstrate bonded to a front side of a photovoltaic device to facilitate handling of very thin photovoltaic devices during fabrication of the module. Modules may also include module front sheets and the solar cells may include bottom sheets. The modules may be made of flexible materials, and may be foldable. Fabrication processes include tabbing photovoltaic devices prior to attaching the individual superstrates.Type: ApplicationFiled: October 8, 2015Publication date: May 18, 2017Inventors: Kramadhati V. Ravi, Tirunelveli S. Ravi, Ashish Asthana, Somnath Nag
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Patent number: 9466595Abstract: Methods of forming a microelectronic structure are described. Those methods comprise forming a bond between a non-device side of a first die and a non-device side of a second die, wherein forming the bond between the non-device side of the first die and the non-device side of the second die does not comprise using an interfacial glue.Type: GrantFiled: October 4, 2004Date of Patent: October 11, 2016Assignee: Intel CorporationInventors: Kramadhati V. Ravi, Jim Maveety
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Patent number: 9455360Abstract: Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These metal wrap through solar cells have a planar back contact geometry for the base and emitter contacts. Fabrication of a metal wrap through solar cell may comprise: providing a photovoltaic device attached at the emitter side of the device to a solar glass by an encapsulant, the device including busbars on the device emitter; forming vias through the device base and emitter, the vias terminating in the busbars; depositing a conformal dielectric film over the surface of the vias and the back surface of the base; removing portions of the conformal dielectric film from the ends of the vias for exposing the busbars and from field areas of the base; and forming separate electrical contacts to the busbars and the field areas on the back surface of the solar cell.Type: GrantFiled: November 7, 2014Date of Patent: September 27, 2016Assignee: Crystal Solar, Inc.Inventors: Ashish Asthana, Tirunelveli S. Ravi, Kramadhati V. Ravi, Somnath Nag
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Publication number: 20160233824Abstract: Photovoltaic modules including a plurality of solar cells bonded to a module back sheet are described herein, wherein each solar cell includes a superstrate bonded to a front side of a photovoltaic device to facilitate handling of very thin photovoltaic devices during fabrication of the module. Modules may also include module front sheets and the solar cells may include bottom sheets. The modules may be made of flexible materials, and may be foldable. Fabrication processes include tabbing photovoltaic devices prior to attaching the individual superstrates.Type: ApplicationFiled: October 8, 2015Publication date: August 11, 2016Inventors: Kramadhati V. Ravi, Tirunelveli S. Ravi, Ashish Asthana, Somnath Nag
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Patent number: 9406582Abstract: A method and apparatus to minimize thermal impedance using copper on the die or chip backside. Some embodiments use deposited copper having a thickness chosen to complement a given chip thickness, in order to reduce or minimize wafer warpage. In some embodiments, the wafer, having a plurality of chips (e.g., silicon), is thinned (e.g., by chemical-mechanical polishing) before deposition of the copper layer, to reduce the thermal resistance of the chip. Some embodiments further deposit copper in a pattern of bumps, raised areas, or pads, e.g., in a checkerboard pattern, to thicken and add copper while reducing or minimizing wafer warpage and chip stress.Type: GrantFiled: July 24, 2008Date of Patent: August 2, 2016Assignee: Intel CorporationInventors: Fay Hua, Gregory M. Chrysler, James G. Maveety, Kramadhati V. Ravi
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Patent number: 9257284Abstract: Methods are described for fabricating HIT solar cells, including double heterojunction and hybrid heterojunction-homojunction solar cells, with very thin single crystal silicon wafers, where the silicon wafer may be less than 80 microns thick, and even less than 50 microns thick. The methods overcome potential issues with handling these very thin wafers by using a process including epitaxial silicon deposition on a growth substrate, partial cell fabrication, attachment to a support substrate and then separation from the growth substrate. Some embodiments of the present invention may include a solar cell device architecture comprising the combination of a heterostructure on the front side of the device with a homojunction at the rear of the device. Furthermore, device performance may be enhanced by including a dielectric stack on the backside of the device for reflecting long wavelength infrared radiation.Type: GrantFiled: January 14, 2013Date of Patent: February 9, 2016Assignee: Crystal Solar, IncorporatedInventor: Kramadhati V. Ravi
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Publication number: 20150187966Abstract: Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These metal wrap through solar cells have a planar back contact geometry for the base and emitter contacts. Fabrication of a metal wrap through solar cell may comprise: providing a photovoltaic device attached at the emitter side of the device to a solar glass by an encapsulant, the device including busbars on the device emitter; forming vias through the device base and emitter, the vias terminating in the busbars; depositing a conformal dielectric film over the surface of the vias and the back surface of the base; removing portions of the conformal dielectric film from the ends of the vias for exposing the busbars and from field areas of the base; and forming separate electrical contacts to the busbars and the field areas on the back surface of the solar cell.Type: ApplicationFiled: November 7, 2014Publication date: July 2, 2015Inventors: Ashish Asthana, Tirunelveli S. Ravi, Kramadhati V. Ravi, Somnath Nag
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Publication number: 20150059847Abstract: Passivated emitter rear local epitaxy (PERL-e) thin Si solar cells may be formed with a heavily doped epitaxial back surface field (BSF) layer, which is patterned to form well spaced point contacts to the silicon base on the rear of the solar cell. The back side of the cell may be finished with a dielectric passivation layer and a metallization layer for making electrical contact to the cell. PERL-e thick Si solar cells may be formed with heavily doped epitaxial films as the back point contacts, where the point contacts are defined by the provision of a selectively patterned thermal oxide on the rear wafer surface. Furthermore, absorption of longer wavelength, infrared (IR), light in thin silicon solar cells may be improved by the addition of a dielectric stack on the rear surface of the solar cell (a back reflector), the stack acting to reflect the longer wavelength light back through the active layers of the solar cell.Type: ApplicationFiled: August 15, 2014Publication date: March 5, 2015Inventors: Kramadhati V. Ravi, Tirunelveli S. Ravi
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Patent number: 8883552Abstract: Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These metal wrap through solar cells have a planar back contact geometry for the base and emitter contacts. Fabrication of a metal wrap through solar cell may comprise: providing a photovoltaic device attached at the emitter side of the device to a solar glass by an encapsulant, the device including busbars on the device emitter; forming vias through the device base and emitter, the vias terminating in the busbars; depositing a conformal dielectric film over the surface of the vias and the back surface of the base; removing portions of the conformal dielectric film from the ends of the vias for exposing the busbars and from field areas of the base; and forming separate electrical contacts to the busbars and the field areas on the back surface of the solar cell.Type: GrantFiled: August 11, 2011Date of Patent: November 11, 2014Assignee: Crystal Solar Inc.Inventors: Ashish Asthana, Tirunelveli S. Ravi, Kramadhati V. Ravi, Somnath Nag
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Patent number: 8809097Abstract: Passivated emitter rear local epitaxy (PERL-e) thin Si solar cells may be formed with a heavily doped epitaxial back surface field (BSF) layer, which is patterned to form well spaced point contacts to the silicon base on the rear of the solar cell. The back side of the cell may be finished with a dielectric passivation layer and a metallization layer for making electrical contact to the cell. PERL-e thick Si solar cells may be formed with heavily doped epitaxial films as the back point contacts, where the point contacts are defined by the provision of a selectively patterned thermal oxide on the rear wafer surface. Furthermore, absorption of longer wavelength, infrared (IR), light in thin silicon solar cells may be improved by the addition of a dielectric stack on the rear surface of the solar cell (a back reflector).Type: GrantFiled: September 22, 2011Date of Patent: August 19, 2014Assignee: Crystal Solar IncorporatedInventors: Kramadhati V. Ravi, Tirunelveli S. Ravi
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Publication number: 20130056044Abstract: Photovoltaic modules including a plurality of solar cells bonded to a module back sheet are described herein, wherein each solar cell includes a superstrate bonded to a front side of a photovoltaic device to facilitate handling of very thin photovoltaic devices during fabrication of the module. Modules may also include module front sheets and the solar cells may include bottom sheets. The modules may be made of flexible materials, and may be foldable. Fabrication processes include tabbing photovoltaic devices prior to attaching the individual superstrates.Type: ApplicationFiled: August 3, 2012Publication date: March 7, 2013Applicant: Crystal Solar, Inc.Inventors: Kramadhati V. Ravi, Tirunelveli S. Ravi, Ashish Asthana, Somnath Nag
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Patent number: 8258579Abstract: A stressed semiconductor using carbon is provided. At least one carbon layer containing diamond is formed either below a semiconductor layer or above a semiconductor device. The carbon layer induces stress in the semiconductor layer, thereby increasing carrier mobility in the device channel region. The carbon layer may be selectively formed or patterned to localize the induced stress.Type: GrantFiled: July 12, 2010Date of Patent: September 4, 2012Assignee: Intel CorporationInventors: Kramadhati V. Ravi, Brian S. Doyle
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Patent number: 8124509Abstract: The porosity of a diamond film may be increased and its dielectric constant lowered by exposing a film containing sp3 hybridization to ion implantation. The implantation produces a greater concentration of sp2 hybridizations. The sp2 hybridizations may then be selectively etched, for example, using atomic hydrogen plasma to increase the porosity of the film. A series of layers may be deposited and successively treated in the same fashion to build up a composite, porous diamond film.Type: GrantFiled: May 28, 2004Date of Patent: February 28, 2012Assignee: Intel CorporationInventors: Kramadhati V. Ravi, Yuli Chakk
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Publication number: 20120040487Abstract: Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These metal wrap through solar cells have a planar back contact geometry for the base and emitter contacts. Fabrication of a metal wrap through solar cell may comprise: providing a photovoltaic device attached at the emitter side of the device to a solar glass by an encapsulant, the device including busbars on the device emitter; forming vias through the device base and emitter, the vias terminating in the busbars; depositing a conformal dielectric film over the surface of the vias and the back surface of the base; removing portions of the conformal dielectric film from the ends of the vias for exposing the busbars and from field areas of the base; and forming separate electrical contacts to the busbars and the field areas on the back surface of the solar cell.Type: ApplicationFiled: August 11, 2011Publication date: February 16, 2012Applicant: Crystal Solar, Inc.Inventors: Ashish Asthana, Tirunelveli S. Ravi, Kramadhati V. Ravi, Somnath Nag
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Publication number: 20110056532Abstract: A method for fabricating a photovoltaic (PV) cell panel wherein each of a plurality of silicon donor wafers has a separation layer formed on its upper surface, e.g., porous anodically etched silicon. On each donor wafer, a PV cell is then partially completed including at least part of inter-cell interconnect, after which plural donor wafers are laminated to a backside substrate or frontside. All of the donor wafers are then separated from the partially completed PV cells in an exfoliation process, followed by simultaneous completion of the remaining PV cell structures on PV cells. Finally, a second lamination to a frontside glass or a backside panel completes the PV cell panel. The separated donor wafers may be reused in forming other PV cells. Use of epitaxial deposition to form the layers of the PV cells enables improved dopant distributions and sharper junction profiles for improved PV cell efficiency.Type: ApplicationFiled: September 9, 2009Publication date: March 10, 2011Applicant: CRYSTAL SOLAR, INC.Inventors: Tirunelveli S. Ravi, Ananda Kumar, Kramadhati V. Ravi
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Patent number: 7875934Abstract: Disclosed is a method of forming a substrate having islands of diamond (or other material, such as diamond-like carbon), as well as integrated circuit devices formed from such a substrate. A diamond island can form part of the thermal solution for an integrated circuit formed on the substrate, and the diamond island can also provide part of a stress engineering solution to improve performance of the integrated circuit. Other embodiments are described and claimed.Type: GrantFiled: November 7, 2008Date of Patent: January 25, 2011Assignee: Intel CorporationInventors: Rajashree Baskaran, Kramadhati V. Ravi
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Patent number: 7842537Abstract: A stressed semiconductor using carbon is provided. At least one carbon layer containing diamond is formed either below a semiconductor layer or above a semiconductor device. The carbon layer induces stress in the semiconductor layer, thereby increasing carrier mobility in the device channel region. The carbon layer may be selectively formed or patterned to localize the induced stress.Type: GrantFiled: February 14, 2005Date of Patent: November 30, 2010Assignee: Intel CorporationInventors: Kramadhati V. Ravi, Brian S. Doyle
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Publication number: 20100276758Abstract: A stressed semiconductor using carbon is provided. At least one carbon layer containing diamond is formed either below a semiconductor layer or above a semiconductor device. The carbon layer induces stress in the semiconductor layer, thereby increasing carrier mobility in the device channel region. The carbon layer may be selectively formed or patterned to localize the induced stress.Type: ApplicationFiled: July 12, 2010Publication date: November 4, 2010Inventors: Kramadhati V. Ravi, Brian S. Doyle
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Publication number: 20100108130Abstract: A design and manufacturing method for an interdigitated backside contact photovoltaic (PV) solar cell less than 100 ?m thick are disclosed. A porous silicon layer is formed on a wafer substrate. Portions of the PV cell are then formed using diffusion, epitaxy and autodoping from the substrate. All backside processing of the solar cell (junctions, passivation layer, metal contacts to the N+ and P+ regions) is performed while the thin epitaxial layer is attached to the porous layer and substrate. After backside processing, the wafer is clamped and exfoliated. The front of the PV cell is completed from the region of the wafer near the exfoliation fracture layer, with subsequent removal of the porous layer, texturing, passivation and deposition of an antireflective coating. During manufacturing, the cell is always supported by either the bulk wafer or a wafer chuck, with no processing of bare thin PV cells.Type: ApplicationFiled: October 31, 2008Publication date: May 6, 2010Applicant: Crystal Solar, Inc.Inventor: Kramadhati V. Ravi
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Publication number: 20100108134Abstract: A design and manufacturing method for a photovoltaic (PV) solar cell less than 100 ?m thick are disclosed. A porous silicon layer is formed on a wafer substrate. Portions of the PV cell are then formed using diffusion, epitaxy and autodoping from the substrate. All front side processing of the solar cell (junctions, passivation layer, anti-reflective coating, contacts to the N+-type layer) is performed while the thin epitaxial layer is attached to the porous layer and substrate. The wafer is then clamped and exfoliated. The back side of the PV cell is completed from the region of the wafer near the exfoliation fracture layer, with subsequent removal of the porous layer, passivation, patterning of contacts, deposition of a conductive coating, and contacts to the P+-type layer.Type: ApplicationFiled: October 31, 2008Publication date: May 6, 2010Applicant: Crystal Solar, Inc.Inventor: Kramadhati V. Ravi