Patents by Inventor Kuan-Chih Huang
Kuan-Chih Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955484Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.Type: GrantFiled: June 10, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Jung Chen, I-Chih Chen, Chih-Mu Huang, Kai-Di Wu, Ming-Feng Lee, Ting-Chun Kuan
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Publication number: 20230246396Abstract: A connector assembly includes a guiding shield cage, a receptacle connector, a partitioning bracket and a movable heat sink. The receptacle connector is provided to a rear segment of an interior of the guiding shield cage, the receptacle connector has an upper receptacle and a lower receptacle. The partitioning bracket is provided in the guiding shield cage, the partitioning bracket and the guiding shield cage together define an upper receiving space which corresponds to the upper receptacle and a lower receiving space which corresponds to the lower receptacle. The movable heat sink is assembled to the partitioning bracket, the movable heat sink is capable of moving relative to the partitioning bracket between a front position where the movable heat sink is positioned in front of a front end of the upper receptacle a front end of the lower receptacle and a rearward position where the movable heat sink at least partially enters into between the upper receptacle and the lower receptacle.Type: ApplicationFiled: January 19, 2023Publication date: August 3, 2023Inventors: Ming-Huei KAO, Kuan-Chih HUANG, Vivek SHAH, Saiyed Muhammad Hasan ALI, Hui-Hsuan YANG, Kuan-Lin PENG, Wei-Cheng LIN
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Publication number: 20220320827Abstract: A photonic crystal surface emitting laser device including at least one photonic crystal surface emitting laser unit is provided. The photonic crystal surface emitting laser unit includes a light-emitting layer, a photonic crystal layer, a doped semiconductor layer, and a diffractive grating. The light-emitting layer is configured to emit a light beam. The photonic crystal layer is disposed on one side of the light-emitting layer. The doped layer is disposed on another side of the light-emitting layer. The diffractive grating is disposed on the photonic crystal layer or the doped semiconductor layer.Type: ApplicationFiled: March 31, 2022Publication date: October 6, 2022Applicant: Phosertek CorporationInventors: Lih-Ren Chen, Kuo-Bin Hong, Tien-Chang Lu, Chien-Hung Lin, Hsiu-Ling Chen, Kuan-Chih Huang
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Patent number: 10510661Abstract: Semiconductor devices and methods of forming the same are provided. One of the semiconductor devices comprises a conductive layer, a first dielectric layer disposed over the conductive layer, a magnetic layer disposed over the first dielectric layer, and a plurality of tantalum layers and a plurality of tantalum oxide layers alternately disposed between the magnetic layer and the first dielectric layer.Type: GrantFiled: November 29, 2018Date of Patent: December 17, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hon-Lin Huang, Chen-Shien Chen, Chin-Yu Ku, Kuan-Chih Huang, Wei-Li Huang
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Publication number: 20190096804Abstract: Semiconductor devices and methods of forming the same are provided. One of the semiconductor devices comprises a conductive layer, a first dielectric layer disposed over the conductive layer, a magnetic layer disposed over the first dielectric layer, and a plurality of tantalum layers and a plurality of tantalum oxide layers alternately disposed between the magnetic layer and the first dielectric layer.Type: ApplicationFiled: November 29, 2018Publication date: March 28, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hon-Lin Huang, Chen-Shien Chen, Chin-Yu Ku, Kuan-Chih Huang, Wei-Li Huang
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Patent number: 10170536Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a first passivation layer over the substrate; a second passivation layer over the first passivation layer; a magnetic layer in the second passivation layer; and an etch stop layer between the magnetic layer and the first passivation layer, wherein the etch stop layer includes at least one acid resistant layer, and the acid resistant layer includes a metal oxide. A method for manufacturing a semiconductor structure is also disclosed.Type: GrantFiled: June 19, 2017Date of Patent: January 1, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Hung-Wen Hsu, Yen-Shuo Su, Jiech-Fun Lu, Kuan Chih Huang, Tze Yun Chou, Chun-Mao Chiu, Tao-Sheng Chang
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Patent number: 10163781Abstract: Semiconductor devices and methods of forming the same are disclosed. One of the semiconductor devices includes a conductive layer, a first dielectric layer, a magnetic layer and an etch stop stack. The first dielectric layer is disposed over the conductive layer. The magnetic layer is disposed over the first dielectric layer. The etch stop stack is disposed between the magnetic layer and the first dielectric layer. The etch stop stack includes a second dielectric layer and a plurality of unit layers between the second dielectric layer and the magnetic layer, and each of the plurality of unit layers comprises a tantalum layer and a tantalum oxide layer on the tantalum layer.Type: GrantFiled: October 31, 2017Date of Patent: December 25, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hon-Lin Huang, Chen-Shien Chen, Chin-Yu Ku, Kuan-Chih Huang, Wei-Li Huang
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Publication number: 20180366536Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a first passivation layer over the substrate; a second passivation layer over the first passivation layer; a magnetic layer in the second passivation layer; and an etch stop layer between the magnetic layer and the first passivation layer, wherein the etch stop layer includes at least one acid resistant layer, and the acid resistant layer includes a metal oxide. A method for manufacturing a semiconductor structure is also disclosed.Type: ApplicationFiled: June 19, 2017Publication date: December 20, 2018Inventors: HUNG-WEN HSU, YEN-SHUO SU, JIECH-FUN LU, KUAN CHIH HUANG, TZE YUN CHOU, CHUN-MAO CHIU, TAO-SHENG CHANG
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Publication number: 20180350739Abstract: Semiconductor devices and methods of forming the same are disclosed. One of the semiconductor devices includes a conductive layer, a first dielectric layer, a magnetic layer and an etch stop stack. The first dielectric layer is disposed over the conductive layer. The magnetic layer is disposed over the first dielectric layer. The etch stop stack is disposed between the magnetic layer and the first dielectric layer. The etch stop stack includes a second dielectric layer and a plurality of unit layers between the second dielectric layer and the magnetic layer, and each of the plurality of unit layers comprises a tantalum layer and a tantalum oxide layer on the tantalum layer.Type: ApplicationFiled: October 31, 2017Publication date: December 6, 2018Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hon-Lin Huang, Chen-Shien Chen, Chin-Yu Ku, Kuan-Chih Huang, Wei-Li Huang
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Patent number: 10037951Abstract: A semiconductor package includes a radio frequency (RF) module, an antenna, an electromagnetic (EM) shield and a first mold body. The RF module having a bottom and a lateral side, wherein, the RF module includes a module board at the bottom. The antenna located at the lateral side of the RF module. The EM shield covering the RF module, wherein the EM shield includes a side wall disposed along the lateral side of the RF module, and the side wall of the EM shield is between the RF module and the antenna. The first mold body fixing the EM shield and the antenna, such that the antenna is spaced apart from the side wall of the EM shield by a predetermined distance.Type: GrantFiled: November 29, 2016Date of Patent: July 31, 2018Assignee: CYNTEC CO., LTD.Inventors: Chia-Hsien Shen, Kuan-Chih Huang, Shu-Wei Chang, Joseph D. S. Deng
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Publication number: 20180151518Abstract: A semiconductor package includes a radio frequency (RF) module, an antenna, an electromagnetic (EM) shield and a first mold body. The RF module having a bottom and a lateral side, wherein, the RF module includes a module board at the bottom. The antenna located at the lateral side of the RF module. The EM shield covering the RF module, wherein the EM shield includes a side wall disposed along the lateral side of the RF module, and the side wall of the EM shield is between the RF module and the antenna. The first mold body fixing the EM shield and the antenna, such that the antenna is spaced apart from the side wall of the EM shield by a predetermined distance.Type: ApplicationFiled: November 29, 2016Publication date: May 31, 2018Applicant: CYNTEC CO., LTD.Inventors: Chia-Hsien SHEN, Kuan-Chih HUANG, Shu-Wei CHANG, Joseph D. S. DENG
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Patent number: 9691710Abstract: A semiconductor package includes a substrate, a plurality of pin pads, a radio frequency (RF) pad, a semiconductor component, at least one surface mount device (SMD) component, a mold compound, a printed circuit board (PCB) antenna and a conductive solder. The RF pad is used to receive or transmit an RF signal on the top side of the substrate. The SMD component is mounted on the RF pad. The mold compound on the top side of the substrate covers the semiconductor component and the SMD component. The PCB antenna is located on the mold compound. Wherein, the conductive solder and the SMD component are stacked between the RF pad and a feeding structure of the PCB antenna.Type: GrantFiled: December 4, 2015Date of Patent: June 27, 2017Assignee: CYNTEC CO., LTDInventors: Joseph D. S. Deng, Chia-Hsien Shen, Shu-Wei Chang, Kuan-Chih Huang
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Publication number: 20170162514Abstract: A semiconductor package includes a substrate, a plurality of pin pads, a radio frequency (RF) pad, a semiconductor component, at least one surface mount device (SMD) component, a mold compound, a printed circuit board (PCB) antenna and a conductive solder. The RF pad is used to receive or transmit an RF signal on the top side of the substrate. The SMD component is mounted on the RF pad. The mold compound on the top side of the substrate covers the semiconductor component and the SMD component. The PCB antenna is located on the mold compound. Wherein, the conductive solder and the SMD component are stacked between the RF pad and a feeding structure of the PCB antenna.Type: ApplicationFiled: December 4, 2015Publication date: June 8, 2017Applicant: CYNTEC CO., LTD.Inventors: Joseph D. S. DENG, Chia-Hsien SHEN, Shu-Wei CHANG, Kuan-Chih HUANG
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Patent number: 9440501Abstract: An ID code learning device includes a RF transceiving module, a received signal strength indication (RSSI) module, and a processing circuit. The RF transceiving module receives RF signals, and each of the RF signals contains an ID code. The RSSI module is electrically connected to the RF transceiving module to detect signal strengths of the RF signals received by the RF transceiving module. The processing circuit is electrically connected to the RF transceiving module and the received signal strength indication module respectively. The received signal strength indication module detects the RF signal with the highest signal strength, the processing circuit pairs the ID code thereof with a predetermined tire location code, and then the RF transceiving module transmits a pairing result out.Type: GrantFiled: August 15, 2014Date of Patent: September 13, 2016Assignee: MOBILETRON ELECTRONICS CO., LTD.Inventors: Shiao-Hwa Huang, Kuan-Chih Huang, Yu-Liang Chou
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Patent number: 9406833Abstract: Neutron-detecting structures and methods of fabrication are provided which include: a substrate with a plurality of cavities extending into the substrate from a surface; a p-n junction within the substrate and extending, at least in part, in spaced opposing relation to inner cavity walls of the substrate defining the plurality of cavities; and a neutron-responsive material disposed within the plurality of cavities. The neutron-responsive material is responsive to neutrons absorbed for releasing ionization radiation products, and the p-n junction within the substrate spaced in opposing relation to and extending, at least in part, along the inner cavity walls of the substrate reduces leakage current of the neutron-detecting structure.Type: GrantFiled: September 10, 2015Date of Patent: August 2, 2016Assignee: RENSSELAER POLYTECHNIC INSTITUTEInventors: Rajendra P. Dahal, Jacky Kuan-Chih Huang, James J. Q. Lu, Yaron Danon, Ishwara B. Bhat
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Publication number: 20150380593Abstract: Neutron-detecting structures and methods of fabrication are provided which include: a substrate with a plurality of cavities extending into the substrate from a surface; a p-n junction within the substrate and extending, at least in part, in spaced opposing relation to inner cavity walls of the substrate defining the plurality of cavities; and a neutron-responsive material disposed within the plurality of cavities. The neutron-responsive material is responsive to neutrons absorbed for releasing ionization radiation products, and the p-n junction within the substrate spaced in opposing relation to and extending, at least in part, along the inner cavity walls of the substrate reduces leakage current of the neutron-detecting structure.Type: ApplicationFiled: September 10, 2015Publication date: December 31, 2015Applicant: RENSSELAER POLYTECHNIC INSTITUTEInventors: Rajendra P. DAHAL, Jacky Kuan-Chih HUANG, James J.Q. LU, Yaron DANON, Ishwara B. BHAT
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Patent number: 9151853Abstract: Neutron-detecting structures and methods of fabrication are provided which include: a substrate with a plurality of cavities extending into the substrate from a surface; a p-n junction within the substrate and extending, at least in part, in spaced opposing relation to inner cavity walls of the substrate defining the plurality of cavities; and a neutron-responsive material disposed within the plurality of cavities. The neutron-responsive material is responsive to neutrons absorbed for releasing ionization radiation products, and the p-n junction within the substrate spaced in opposing relation to and extending, at least in part, along the inner cavity walls of the substrate reduces leakage current of the neutron-detecting structure.Type: GrantFiled: November 7, 2013Date of Patent: October 6, 2015Assignee: RENSSELAER POLYTECHNIC INSTITUTEInventors: Rajendra P. Dahal, Jacky Kuan-Chih Huang, James J. Q. Lu, Yaron Danon, Ishwara B. Bhat
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Publication number: 20150068893Abstract: A biosensor test device of this disclosure includes a biosensor test strip and biosensor monitor connecting with the biosensor test strip. The biosensor test strip includes a base layer and at least one test section. The test section includes a first electrode, a second electrode, a first track, a second track, a first contact pad, a second contact pad and a reaction zone formed on a base layer. The first track is electrically connected to both the first electrode and the first contact pad. The second track is electrically connected to both the second electrode and the second contact pad. The reaction zone is coated with reagents which contact at least one of the first electrode or the second electrode.Type: ApplicationFiled: September 10, 2014Publication date: March 12, 2015Inventors: JEN-FANG LEE, Kuan-Chih Huang
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Publication number: 20150068923Abstract: The disclosure is directed to biosensor monitors, test strips and activation mechanisms and methods thereof. The biosensor monitor is for verifying a test strip to be used with the biosensor monitor. The monitor includes verification components located within the monitor and accessible to a test strip to be inserted into the biosensor monitor. The verification components interact with verification portions of the test strip to allow the biosensor monitor to verify the test strip before the biosensor monitor tests biological material on the test strip. A test strip and methods are also described.Type: ApplicationFiled: September 10, 2014Publication date: March 12, 2015Inventors: JEN-FANG LEE, KUAN-CHIH HUANG
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Publication number: 20150054640Abstract: An ID code learning device includes a RF transceiving module, a received signal strength indication (RSSI) module, and a processing circuit. The RF transceiving module receives RF signals, and each of the RF signals contains an ID code. The RSSI module is electrically connected to the RF transceiving module to detect signal strengths of the RF signals received by the RF transceiving module. The processing circuit is electrically connected to the RF transceiving module and the received signal strength indication module respectively. The received signal strength indication module detects the RF signal with the highest signal strength, the processing circuit pairs the ID code thereof with a predetermined tire location code, and then the RF transceiving module transmits a pairing result out.Type: ApplicationFiled: August 15, 2014Publication date: February 26, 2015Inventors: SHIAO-HWA HUANG, KUAN-CHIH HUANG, YU-LIANG CHOU