Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and nanostructures formed over the substrate. The semiconductor structure further includes a gate structure surrounding the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure further includes a contact formed over the source/drain structure and extending into the source/drain structure.

Abstract: An electronic darting system, a processing method for an electronic darts game, and a dartboard device are provided. The electronic darting system includes a dartboard device, a tip unit, and an image providing device. The dartboard device includes a dartboard case, a plurality of induction circuits, and a control circuit. The dartboard case includes a board surface. The plurality of induction circuits are disposed on the board surface, and the plurality of induction circuits are intersecting with each other to form a plurality of induction areas of a plurality of target areas of the board surface. The image providing device provides a plurality of images onto the board surface of the dartboard case.

Abstract: A heterojunction bipolar transistor includes a substrate, a semiconductor unit, an electrode unit and a dielectric layer. The semiconductor unit includes a collector layer, a base layer and an emitter layer sequentially formed on the substrate in such order. The electrode unit includes a collector electrode, a base electrode, and an emitter electrode respectively disposed on the collector layer, the base layer and the emitter layer. The dielectric layer covers and cooperates with the emitter layer to define an opening extending therethrough and terminating at the base layer to expose a contact region. The base electrode is disposed on the contact region, extends through the opening, and partially covers the dielectric layer.

Abstract: A semiconductor device includes a substrate, at least one heterojunction bipolar transistor including a semiconductor unit and an electrode unit, an insulation unit, and a heat dissipation unit. The insulation unit covers the substrate and the heterojunction bipolar transistor such that a collector electrode, a base electrode and an emitter electrode of the electrode unit are electrically isolated from one another. The insulation unit is formed with an opening to expose an electrode wire of the emitter electrode. The heat dissipation unit covers the electrode wire and is made of an electrically conductive and heat dissipating material, and has a thickness that is not less than 3 ?m.

Abstract: A heterojunction bipolar transistor includes a substrate, a semiconductor unit, an electrode unit and a dielectric layer. The semiconductor unit includes a collector layer, a base layer and an emitter layer sequentially formed on the substrate in such order. The electrode unit includes a collector electrode, a base electrode, and an emitter electrode respectively disposed on the collector layer, the base layer and the emitter layer. The dielectric layer covers and cooperates with the emitter layer to define an opening extending therethrough and terminating at the base layer to expose a contact region. The base electrode is disposed on the contact region, extends through the opening, and partially covers the dielectric layer.

Abstract: A wireless joint includes a converter, a radio frequency (RF) device, and a connector. The converter realizes a conversion between an audio signal and a wireless signal. The RF device receives and transmits the wireless signal. The connector connects with a microphone body.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with an opening bonded to a carrier board in order to form a compound carrier board structure. A die is placed in the opening and bonded to the carrier board. A sealant is filled in a gap between surrounding walls of the opening and the die at a height lower than the die to fixedly place the die within the opening and to leave a non-active surface of the die exposed.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with an opening bonded to a carrier board in order to form a compound carrier board structure. A die is placed in the opening and bonded to the carrier board. A sealant is filled in a gap between surrounding walls of the opening and the die at a height lower than the die to fixedly place the die within the opening and to leave a non-active surface of the die exposed.

Abstract: A memory apparatus includes a memory sector including N memory blocks and N local bit lines, a pre-charge circuit, and a program sector selector. Each of the N memory blocks includes a plurality of memory cells. Each of the N local bit lines is coupled to memory cells in a corresponding memory block. The pre-charge circuit is coupled to the N local bit lines. The program block selector is coupled to the N local bit lines and configured to apply a first voltage to a selected local bit line coupled to a selected memory block during a program mode of the selected memory block. Unselected local bit lines coupled to unselected memory blocks are pre-charged to a second voltage by the pre-charge circuit during the program mode of the selected memory block, thereby avoiding current leakages of the memory apparatus.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with a penetrating rectangular opening bonded to a non-conductive film then a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

Abstract: A connection adapter is provided. In certain configurations, the connection adapter includes an input portion with a plurality of sets of input connectors, a first output portion extending from the input portion in a first direction and including a first set of output connectors, and a second output portion extending from the input portion in a second direction and including a second set of output connectors. In the connection adapter, the sets of input connectors are electrically coupled to each of the first set of output connectors and the second set of output connectors. Further, the first and second directions are substantially perpendicular to each other, while the input portion extends in a third direction that is not substantially perpendicular to the first direction or the second direction.

Abstract: A wireless joint includes a converter, a radio frequency (RF) device, and a connector. The converter realizes a conversion between an audio signal and a wireless signal. The RF device receives and transmits the wireless signal. The connector connects with a microphone body.

Abstract: A power supply voltage switching circuit includes a power selecting module, a level shifting module, and a supply switching module. The power selecting module receives a first supply signal and a second supply signal, and outputs an intermediate supply signal according to the first supply signal and the second supply signal. The level shifting module receives the intermediate supply signal as a power supply, and generates a first shifted signal and a second shifted signal by shifting voltage levels of a first control signal and a second control signal respectively. The supply switching module receives the first supply signal and a third supply signal, and generates an output signal according to the first shifted signal, the second shifted signal, the first control signal, and the second control signal.

Abstract: A connection adapter is provided. In certain configurations, the connection adapter includes an input portion with a plurality of sets of input connectors, a first output portion extending from the input portion in a first direction and including a first set of output connectors, and a second output portion extending from the input portion in a second direction and including a second set of output connectors. In the connection adapter, the sets of input connectors are electrically coupled to each of the first set of output connectors and the second set of output connectors. Further, the first and second directions are substantially perpendicular to each other, while the input portion extends in a third direction that is not substantially perpendicular to the first direction or the second direction.

Abstract: A power supply voltage switching circuit includes a power selecting module, a level shifting module, and a supply switching module. The power selecting module receives a first supply signal and a second supply signal, and outputs an intermediate supply signal according to the first supply signal and the second supply signal. The level shifting module receives the intermediate supply signal as a power supply, and generates a first shifted signal and a second shifted signal by shifting voltage levels of a first control signal and a second control signal respectively. The supply switching module receives the first supply signal and a third supply signal, and generates an output signal according to the first shifted signal, the second shifted signal, the first control signal, and the second control signal.

Abstract: A memory apparatus includes a memory sector including N memory blocks and N local bit lines, a pre-charge circuit, and a program sector selector. Each of the N memory blocks includes a plurality of memory cells. Each of the N local bit lines is coupled to memory cells in a corresponding memory block. The pre-charge circuit is coupled to the N local bit lines. The program block selector is coupled to the N local bit lines and configured to apply a first voltage to a selected local bit line coupled to a selected memory block during a program mode of the selected memory block. Unselected local bit lines coupled to unselected memory blocks are pre-charged to a second voltage by the pre-charge circuit during the program mode of the selected memory block, thereby avoiding current leakages of the memory apparatus.

Abstract: An overlay mark including at least one first overlay mark and at least one second overlay mark is provided. The first overlay mark includes a plurality of first bars and a plurality of first spaces arranged alternately, and the first spaces are not constant. The second overlay mark includes a plurality of second bars and a plurality of second spaces arranged alternately, and the second spaces are constant. Besides, the second overlay mark partially overlaps with the first overlay mark.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate having a flip region with a through-opening and bonding to a Non-conductive Film to bond to a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.

Abstract: A compound carrier board structure of Flip-Chip Chip-Scale Package and manufacturing method thereof provides a baseplate with a penetrating rectangular opening bonded to a non-conductive film then a carrier board in order to form a compound carrier board structure. The baseplate is constructed with a low Thermal Expansion Coefficient material.