Patents by Inventor Kuo-Feng Huang

Kuo-Feng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210135052
    Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and is located between the first semiconductor structure and the second semiconductor structure. One of the plurality of semiconductor pairs has a barrier layer and a well layer and includes the first dopant. The barrier layer has a first thickness and a first Al content, and the well layer has a second thickness and a second Al content, the second thickness is less than the first thickness, and the second Al content is less than the first Al content.
    Type: Application
    Filed: November 4, 2020
    Publication date: May 6, 2021
    Inventors: Yen-Chun Tseng, Kuo-Feng Huang, Shih-Chang Lee, Ming-Ta Chin, Shih-Nan Yen, Cheng-Hsing Chiang, Chia-Hung Lin, Cheng-Long Yeh, Yi-Ching Lee, Jui-Che Sung, Shih-Hao Cheng
  • Patent number: 10958093
    Abstract: The present disclosure relates to a power management system. The power management system comprises a first power supply device, a second power supply device, a power supply control device, a data processing device and a load. The power supply control device is connected to the first power supply device. The data processing device is connected to the first power supply device, the second power supply device and the power supply control device. The load is connected to the first power supply device and the second power supply device. The power supply control device is configured to, when activated, provide a first signal to the data processing device. The data processing device is configured to select the first power supply device or the second power supply device to provide power to the load according to the first signal.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: March 23, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tau-Jing Yang, Kuo-Feng Huang, Chih Lung Hung
  • Publication number: 20210066493
    Abstract: A memory device and a manufacturing method thereof are provided. The memory device includes a gate stacking structure, a first insulating layer, a second insulating layer and a first spacer. The gate stacking structure is disposed over a substrate. The first insulating layer covers a top surface and a sidewall of the gate stacking structure. The second insulating layer covers a surface of the first insulating layer. A top corner region of the gate stacking structure is covered by the first and second insulating layers. The first spacer is located on the sidewall of the gate stacking structure, and covers a surface of the second insulating layer. A topmost end of the first spacer is lower than a topmost surface of the second insulating layer.
    Type: Application
    Filed: August 20, 2020
    Publication date: March 4, 2021
    Applicant: Winbond Electronics Corp.
    Inventors: Che-Jui Hsu, Ying-Fu Tung, Chun-Sheng Lu, Kuo-Feng Huang, Yu-Chi Kuo, Wang-Ta Li
  • Patent number: 10916473
    Abstract: A method includes forming a first dielectric layer over a wafer, etching the first dielectric layer to form an opening, filling a tungsten-containing material into the opening, and performing a Chemical Mechanical Polish (CMP) on the wafer. After the CMP, a cleaning is performed on the wafer using a weak base solution.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: February 9, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hao Chung, Chang-Sheng Lin, Kuo-Feng Huang, Li-Chieh Wu, Chun-Chieh Lin
  • Patent number: 10811564
    Abstract: A light-emitting device is provided. The light-emitting device comprises The light-emitting device comprises a light-emitting stack comprising a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; and a third semiconductor layer on the light-emitting stack and comprising a first sub-layer, a second sub-layer and a roughened surface, wherein the first sub-layer has the same composition as that of the second sub-layer, and the second sub-layer is farther from the light-emitting stack than the first sub-layer; wherein the first sub-layer and the second sub-layer each comprises a Group III element and a Group V element, and an atomic ratio of the Group III element to the Group V element of the first sub-layer is less than an atomic ratio of the Group III element to the Group V element of the second sub-layer.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: October 20, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Kuo-Feng Huang, Cheng-Hsing Chiang, Jih-Ming Tu
  • Patent number: 10749077
    Abstract: An optoelectronic device includes a semiconductor stack including a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface. The second contact layer is not overlapped with the first contact layer in a vertical direction. The second contact layer includes a plurality of dots separating to each other and formed of semiconductor material.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: August 18, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
  • Patent number: 10741721
    Abstract: A light-emitting device is provided. The light-emitting device comprises a substrate; an insulating layer on the substrate, wherein the insulating layer comprises a first hole; a light-emitting stack on the insulating layer and comprising an active region comprising a top surface, wherein the top surface comprises a first part and a second part; and an opaque layer covering the first part of the top surface and exposing the second part of the top surface, wherein the second part is directly above the first hole.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: August 11, 2020
    Assignee: EPISTAR Corporation
    Inventors: Cheng-Feng Yu, Ching-Yuan Tsai, Yao-Ru Chang, Hsin-Chan Chung, Shih-Chang Lee, Wen-Luh Liao, Cheng-Hsing Chiang, Kuo-Feng Huang, Hsu-Hsuan Teng, Hung-Ta Cheng, Yung-Fu Chang
  • Patent number: 10741381
    Abstract: A cleaning apparatus and a method of using the cleaning apparatus are provided. The method includes first moving a pencil pad into contact with a top surface of a wafer, wherein the pencil pad is connected to a pivot arm and second moving the pivot arm in a sweeping motion from a first zone to a second zone, the first zone being closer to a center of the top surface of the wafer than the second zone, wherein the sweeping motion is controlled by a controller, the pivot arm moves at a first speed in the first zone and the pivot arm moves at a second speed in the second zone, wherein the first speed is different from the second speed.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: August 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kaw-Wei Kuo, Chun-Hao Kung, Kuo-Feng Huang, Yi-Wei Chiu, Wei-Chun Chen
  • Publication number: 20200220372
    Abstract: The present disclosure relates to a power management system. The power management system comprises a first power supply device, a second power supply device, a power supply control device, a data processing device and a load. The power supply control device is connected to the first power supply device. The data processing device is connected to the first power supply device, the second power supply device and the power supply control device. The load is connected to the first power supply device and the second power supply device. The power supply control device is configured to, when activated, provide a first signal to the data processing device. The data processing device is configured to select the first power supply device or the second power supply device to provide power to the load according to the first signal.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 9, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tau-Jing YANG, Kuo-Feng HUANG, Chih Lung HUNG
  • Patent number: 10622836
    Abstract: The present disclosure relates to a power management system. The power management system comprises a first power supply device, a second power supply device, a power supply control device, a data processing device and a load. The power supply control device is connected to the first power supply device. The data processing device is connected to the first power supply device, the second power supply device and the power supply control device. The load is connected to the first power supply device and the second power supply device. The power supply control device is configured to, when activated, provide a first signal to the data processing device. The data processing device is configured to select the first power supply device or the second power supply device to provide power to the load according to the first signal.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: April 14, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tau-Jing Yang, Kuo-Feng Huang, Chih Lung Hung
  • Patent number: 10580937
    Abstract: An optoelectronic device includes a semiconductor structure having a first side and a second side opposite to the first side, a first pad at the first side, a first finger connected to the electrode pad and having a first width, an insulating layer at the second side and comprising a first part under the first finger, the first part having a bottom surface with a second width larger than the first width and a side surface inclined to the bottom surface, and a contact layer covering the bottom surface and the side surface.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: March 3, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
  • Publication number: 20200051855
    Abstract: A method includes forming a first dielectric layer over a wafer, etching the first dielectric layer to form an opening, filling a tungsten-containing material into the opening, and performing a Chemical Mechanical Polish (CMP) on the wafer. After the CMP, a cleaning is performed on the wafer using a weak base solution.
    Type: Application
    Filed: October 17, 2019
    Publication date: February 13, 2020
    Inventors: Chien-Hao Chung, Chang-Sheng Lin, Kuo-Feng Huang, Li-Chieh Wu, Chun-Chieh Lin
  • Patent number: 10510594
    Abstract: A method includes forming a first dielectric layer over a wafer, etching the first dielectric layer to form an opening, filling a tungsten-containing material into the opening, and performing a Chemical Mechanical Polish (CMP) on the wafer. After the CMP, a cleaning is performed on the wafer using a weak base solution.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hao Chung, Chang-Sheng Lin, Kuo-Feng Huang, Li-Chieh Wu, Chun-Chieh Lin
  • Publication number: 20190229233
    Abstract: A light-emitting device is provided. The light-emitting device comprises a substrate; an insulating layer on the substrate, wherein the insulating layer comprises a first hole; a light-emitting stack on the insulating layer and comprising an active region comprising a top surface, wherein the top surface comprises a first part and a second part; and an opaque layer covering the first part of the top surface and exposing the second part of the top surface, wherein the second part is directly above the first hole.
    Type: Application
    Filed: April 3, 2019
    Publication date: July 25, 2019
    Inventors: Cheng-Feng YU, Ching-Yuan TSAI, Yao-Ru CHANG, Hsin-Chan CHUNG, Shih-Chang LEE, Wen-Luh LIAO, Cheng-Hsing CHIANG, Kuo-Feng HUANG, Hsu-Hsuan TENG, Hung-Ta CHENG, Yung-Fu CHANG
  • Patent number: 10312407
    Abstract: A light-emitting device is provided. The light-emitting device comprises a substrate; an insulating layer on the substrate, wherein the insulating layer comprises a first hole; a light-emitting stack on the insulating layer and comprising an active region comprising a top surface, wherein the top surface comprises a first part and a second part; and an opaque layer covering the first part of the top surface and exposing the second part of the top surface, wherein the second part is directly above the first hole.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: June 4, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Cheng-Feng Yu, Ching-Yuan Tsai, Yao-Ru Chang, Hsin-Chan Chung, Shih-Chang Lee, Wen-Luh Liao, Cheng-Hsing Chiang, Kuo-Feng Huang, Hsu-Hsuan Teng, Hung-Ta Cheng, Yung-Fu Chang
  • Publication number: 20190148591
    Abstract: A light-emitting device is provided. The light-emitting device comprises The light-emitting device comprises a light-emitting stack comprising a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; and a third semiconductor layer on the light-emitting stack and comprising a first sub-layer, a second sub-layer and a roughened surface, wherein the first sub-layer has the same composition as that of the second sub-layer, and the second sub-layer is farther from the light-emitting stack than the first sub-layer; wherein the first sub-layer and the second sub-layer each comprises a Group III element and a Group V element, and an atomic ratio of the Group III element to the Group V element of the first sub-layer is less than an atomic ratio of the Group III element to the Group V element of the second sub-layer.
    Type: Application
    Filed: January 14, 2019
    Publication date: May 16, 2019
    Inventors: Kuo-Feng HUANG, Cheng-Hsing CHIANG, Jih-Ming TU
  • Publication number: 20190148599
    Abstract: An optoelectronic device includes a semiconductor stack including a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface. The second contact layer is not overlapped with the first contact layer in a vertical direction. The second contact layer includes a plurality of dots separating to each other and formed of semiconductor material.
    Type: Application
    Filed: December 20, 2018
    Publication date: May 16, 2019
    Inventors: Chun-Yu LIN, Yung-Fu CHANG, Rong-Ren LEE, Kuo-Feng HUANG, Cheng-Long YEH, Yi-Ching LEE, Ming-Siang HUANG, Ming-Tzung LIOU
  • Publication number: 20190131496
    Abstract: An optoelectronic device includes a semiconductor structure having a first side and a second side opposite to the first side, a first pad at the first side, a first finger connected to the electrode pad and having a first width, an insulating layer at the second side and comprising a first part under the first finger, the first part having a bottom surface with a second width larger than the first width and a side surface inclined to the bottom surface, and a contact layer covering the bottom surface and the side surface.
    Type: Application
    Filed: December 20, 2018
    Publication date: May 2, 2019
    Inventors: Chun-Yu LIN, Yung-Fu CHANG, Rong-Ren LEE, Kuo-Feng HUANG, Cheng-Long YEH, Yi-Ching LEE, Ming-Siang HUANG, Ming-Tzung LIOU
  • Patent number: 10218115
    Abstract: An adapter for connecting to a connector in a first direction is provided. The adapter includes a plurality of signal pins, arranged in a loop, a power pin, configured to transmit a power signal to the connector, and a detection circuit, coupled to the power pin and the plurality of signal pins. A feedback signal is provided by the connector in response to the power signal that is transmitted through one of the plurality of signal pins, and an interface of the connector is identified by the detection circuit and a pin order of the adapter is defined by the detection circuit according to the feedback signal.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: February 26, 2019
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Yi-Wei Yao, Kuo-Feng Huang
  • Patent number: D950421
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: May 3, 2022
    Assignee: KWANG YANG MOTOR CO., LTD.
    Inventors: Kuo-Feng Huang, Ping-Huan Chuang, Ming-Yi Shen, Bo-Jin Wang