Patents by Inventor Kuo-Feng Huang

Kuo-Feng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200387200
    Abstract: An electronic device includes a first body, a second body, two hinges, and at least one electronic assembly. The two hinges are connected between the first body and the second body, and the first body and the second body are adapted to rotate relatively through the two hinges. The electronic assembly is connected to the second body and is located between the two hinges.
    Type: Application
    Filed: January 21, 2020
    Publication date: December 10, 2020
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Ming-Chung Peng, Ko-Fan Chen, Chun-Yi Ho, Chien-Ting Lin, Yu-Jung Liu, Hsin-Jung Lee, Hsin-Yu Huang, Jih-Houng Lee, Ming-Feng Liu, Kuo-Jung Wu, Kuo-Pin Chen, Chia-Ling Lee, Jing-Jie Lin
  • Patent number: 10811377
    Abstract: A package structure is provided. The package structure includes a first bump structure formed over a substrate, a solder joint formed over the first bump structure and a second bump structure formed over the solder joint. The first bump structure includes a first pillar layer formed over the substrate and a first barrier layer formed over the first pillar layer. The first barrier layer has a first protruding portion which extends away from a sidewall surface of the first pillar layer, and a distance between the sidewall surface of the first pillar layer and a sidewall surface of the first barrier layer is in a range from about 0.5 ?m to about 3 ?m. The second bump structure includes a second barrier layer formed over the solder joint and a second pillar layer formed over the second barrier layer, wherein the second barrier layer has a second protruding portion which extends away from a sidewall surface of the second pillar layer.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: October 20, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Hung Chen, Yu-Nu Hsu, Chun-Chen Liu, Heng-Chi Huang, Chien-Chen Li, Shih-Yen Chen, Cheng-Nan Hsieh, Kuo-Chio Liu, Chen-Shien Chen, Chin-Yu Ku, Te-Hsun Pang, Yuan-Feng Wu, Sen-Chi Chiang
  • Patent number: 10811564
    Abstract: A light-emitting device is provided. The light-emitting device comprises The light-emitting device comprises a light-emitting stack comprising a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; and a third semiconductor layer on the light-emitting stack and comprising a first sub-layer, a second sub-layer and a roughened surface, wherein the first sub-layer has the same composition as that of the second sub-layer, and the second sub-layer is farther from the light-emitting stack than the first sub-layer; wherein the first sub-layer and the second sub-layer each comprises a Group III element and a Group V element, and an atomic ratio of the Group III element to the Group V element of the first sub-layer is less than an atomic ratio of the Group III element to the Group V element of the second sub-layer.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: October 20, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Kuo-Feng Huang, Cheng-Hsing Chiang, Jih-Ming Tu
  • Publication number: 20200312817
    Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a second IC die is bonded to a first IC die by a first bonding structure. A third IC die is bonded to the second IC die by a second bonding structure. The second bonding structure is arranged between back sides of the second IC die and the third IC die opposite to corresponding interconnect structures and comprises a first TSV (through substrate via) disposed through a second substrate of the second IC die and a second TSV disposed through a third substrate of the third IC die. The second bonding structure further comprises conductive features with oppositely titled sidewalls disposed between the first TSV and the second TSV.
    Type: Application
    Filed: June 16, 2020
    Publication date: October 1, 2020
    Inventors: Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao, Yung-Lung Lin, Shih-Han Huang, I-Nan Chen
  • Publication number: 20200303351
    Abstract: A method for manufacturing three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a second IC die is formed and bonded to a first IC die by a first bonding structure. A third IC die is formed and bonded to the second IC die by a second bonding structure. The second bonding structure is formed between back sides of the second IC die and the third IC die opposite to corresponding interconnect structures and comprises a first TSV (through substrate via) disposed through a second substrate of the second IC die and a second TSV disposed through a third substrate of the third IC die. In some further embodiments, the second bonding structure is formed by forming conductive features with oppositely titled sidewalls disposed between the first TSV and the second TSV.
    Type: Application
    Filed: June 9, 2020
    Publication date: September 24, 2020
    Inventors: Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao, Yung-Lung Lin, Shih-Han Huang, I-Nan Chen
  • Patent number: 10749077
    Abstract: An optoelectronic device includes a semiconductor stack including a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface. The second contact layer is not overlapped with the first contact layer in a vertical direction. The second contact layer includes a plurality of dots separating to each other and formed of semiconductor material.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: August 18, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
  • Patent number: 10741721
    Abstract: A light-emitting device is provided. The light-emitting device comprises a substrate; an insulating layer on the substrate, wherein the insulating layer comprises a first hole; a light-emitting stack on the insulating layer and comprising an active region comprising a top surface, wherein the top surface comprises a first part and a second part; and an opaque layer covering the first part of the top surface and exposing the second part of the top surface, wherein the second part is directly above the first hole.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: August 11, 2020
    Assignee: EPISTAR Corporation
    Inventors: Cheng-Feng Yu, Ching-Yuan Tsai, Yao-Ru Chang, Hsin-Chan Chung, Shih-Chang Lee, Wen-Luh Liao, Cheng-Hsing Chiang, Kuo-Feng Huang, Hsu-Hsuan Teng, Hung-Ta Cheng, Yung-Fu Chang
  • Patent number: 10727205
    Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a second IC die is bonded to a first IC die by a first bonding structure. The first bonding structure contacts a first interconnect structure of the first IC die and a second interconnection structure of the second IC die, and has a first portion and a second portion hybrid bonded together. A third IC die is bonded to the second IC die by a third bonding structure. The third bonding structure comprises a second TSV (through substrate via) disposed through the second substrate of the second IC die and includes varies bonding structures according to varies embodiments of the invention.
    Type: Grant
    Filed: August 15, 2018
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao, Yung-Lung Lin, Shih-Han Huang, I-Nan Chen
  • Publication number: 20200220372
    Abstract: The present disclosure relates to a power management system. The power management system comprises a first power supply device, a second power supply device, a power supply control device, a data processing device and a load. The power supply control device is connected to the first power supply device. The data processing device is connected to the first power supply device, the second power supply device and the power supply control device. The load is connected to the first power supply device and the second power supply device. The power supply control device is configured to, when activated, provide a first signal to the data processing device. The data processing device is configured to select the first power supply device or the second power supply device to provide power to the load according to the first signal.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 9, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tau-Jing YANG, Kuo-Feng HUANG, Chih Lung HUNG
  • Patent number: 10635874
    Abstract: A burning control system includes a capturing unit, a storing unit, a controlling unit, a processing unit, and a displaying unit. The capturing unit acquires product barcode information and burned barcode information relating to printed circuit board assembly (PCBA). The storing unit can store a program file corresponding to the burned barcode information. The controlling unit obtains product barcode information and the burned barcode information and outputs the burned barcode information to the processing unit. The processing unit writes the program file to a storage chip of the PCBA board. The displaying unit can display one of several prompts for a user's information. A burning control method is also provided.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: April 28, 2020
    Assignee: Goldtek Technology Co., Ltd.
    Inventors: Chih-Hao Huang, Kuo-Lin Chien, Yen-Ching Lee, Chih-Feng Liou
  • Patent number: 10622836
    Abstract: The present disclosure relates to a power management system. The power management system comprises a first power supply device, a second power supply device, a power supply control device, a data processing device and a load. The power supply control device is connected to the first power supply device. The data processing device is connected to the first power supply device, the second power supply device and the power supply control device. The load is connected to the first power supply device and the second power supply device. The power supply control device is configured to, when activated, provide a first signal to the data processing device. The data processing device is configured to select the first power supply device or the second power supply device to provide power to the load according to the first signal.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: April 14, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tau-Jing Yang, Kuo-Feng Huang, Chih Lung Hung
  • Publication number: 20200089926
    Abstract: A burning control system includes a capturing unit, a storing unit, a controlling unit, a processing unit, and a displaying unit. The capturing unit acquires product barcode information and burned barcode information relating to printed circuit board assembly (PCBA). The storing unit can store a program file corresponding to the burned barcode information. The controlling unit obtains product barcode information and the burned barcode information and outputs the burned barcode information to the processing unit. The processing unit writes the program file to a storage chip of the PCBA board. The displaying unit can display one of several prompts for a user's information. A burning control method is also provided.
    Type: Application
    Filed: May 13, 2019
    Publication date: March 19, 2020
    Inventors: CHIH-HAO HUANG, KUO-LIN CHIEN, YEN-CHING LEE, CHIH-FENG LIOU
  • Patent number: 10580937
    Abstract: An optoelectronic device includes a semiconductor structure having a first side and a second side opposite to the first side, a first pad at the first side, a first finger connected to the electrode pad and having a first width, an insulating layer at the second side and comprising a first part under the first finger, the first part having a bottom surface with a second width larger than the first width and a side surface inclined to the bottom surface, and a contact layer covering the bottom surface and the side surface.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: March 3, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
  • Publication number: 20200058617
    Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a second IC die is bonded to a first IC die by a first bonding structure. The first bonding structure contacts a first interconnect structure of the first IC die and a second interconnection structure of the second IC die, and has a first portion and a second portion hybrid bonded together. A third IC die is bonded to the second IC die by a third bonding structure. The third bonding structure comprises a second TSV (through substrate via) disposed through the second substrate of the second IC die and includes varies bonding structures according to varies embodiments of the invention.
    Type: Application
    Filed: August 15, 2018
    Publication date: February 20, 2020
    Inventors: Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao, Yung-Lung Lin, Shih Han Huang, I-Nan Chen
  • Publication number: 20200051855
    Abstract: A method includes forming a first dielectric layer over a wafer, etching the first dielectric layer to form an opening, filling a tungsten-containing material into the opening, and performing a Chemical Mechanical Polish (CMP) on the wafer. After the CMP, a cleaning is performed on the wafer using a weak base solution.
    Type: Application
    Filed: October 17, 2019
    Publication date: February 13, 2020
    Inventors: Chien-Hao Chung, Chang-Sheng Lin, Kuo-Feng Huang, Li-Chieh Wu, Chun-Chieh Lin
  • Publication number: 20200007777
    Abstract: An image-capturing device includes a camera module and a controller. The camera module captures an image of an object. The camera module includes a first camera and a second camera. The first camera has a first field of view (FOV) and captures an image in the first FOV, so as to produce a first image. The second camera is adjacent to the first camera and has a second FOV, in which the first FOV is wider than the second FOV. The second camera captures an image in the second FOV, so as to produce a second image. A displayer displays one of the first and second images. When a zoom ratio of the first image increases, the controller selects a display region in the first image according to an object distance, such that the display region is enlarged and then displayed on the displayer.
    Type: Application
    Filed: June 26, 2019
    Publication date: January 2, 2020
    Inventors: Kuo-Hao HUANG, Chung-Yi KAO, Eric Chi-Chian YU, Shyh-Feng LIN
  • Patent number: 10510594
    Abstract: A method includes forming a first dielectric layer over a wafer, etching the first dielectric layer to form an opening, filling a tungsten-containing material into the opening, and performing a Chemical Mechanical Polish (CMP) on the wafer. After the CMP, a cleaning is performed on the wafer using a weak base solution.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hao Chung, Chang-Sheng Lin, Kuo-Feng Huang, Li-Chieh Wu, Chun-Chieh Lin
  • Patent number: 10501664
    Abstract: A resin composition comprises a styrene-butadiene-styrene block copolymer. The resin composition further comprises a plurality of hydrated inorganic substances and/or a plurality of microcapsule particles dispersed in the styrene-butadiene-styrene block copolymer. The hydrated inorganic substances dehydration to form anhydrous inorganic substances at a dehydration temperature greater than 250 degrees Celsius. Each microcapsule particle comprises a housing and an embedded object encapsulated in the housing. The embedded object will largely volatilize from the housing at an escaping temperature greater than 250 degrees Celsius. A removable adhesive layer, an IC substrate, and an IC packaging process are also provided.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: December 10, 2019
    Assignee: Qi Ding Technology Qinhuangdao Co., Ltd.
    Inventors: Kuo-Sheng Liang, Mei-Ju Pan, Mao-Feng Hsu, Yu-Cheng Huang
  • Publication number: 20190352548
    Abstract: A resin composition comprises a styrene-butadiene-styrene block copolymer. The resin composition further comprises a plurality of hydrated inorganic substances and/or a plurality of microcapsule particles dispersed in the styrene-butadiene-styrene block copolymer. The hydrated inorganic substances dehydration to form anhydrous inorganic substances at a dehydration temperature greater than 250 degrees Celsius. Each microcapsule particle comprises a housing and an embedded object encapsulated in the housing. The embedded object will largely volatilize from the housing at an escaping temperature greater than 250 degrees Celsius. A removable adhesive layer, an IC substrate, and an IC packaging process are also provided.
    Type: Application
    Filed: September 12, 2018
    Publication date: November 21, 2019
    Inventors: KUO-SHENG LIANG, MEI-JU PAN, MAO-FENG HSU, YU-CHENG HUANG
  • Publication number: 20190311927
    Abstract: An aluminum adhering process and a vacuum transfer chamber for a metal thin film plating machine. The vacuum transfer chamber includes a vacuum transfer chamber and a pre etching reacting cavity installed in a periphery of and communicated to the vacuum transfer chamber. The pre etching reacting cavity is in a very high vacuum state. The vacuum transfer chamber is installed with a robot. The aluminum adhering process includes steps of: installing a locating frame in the vacuum transfer chamber and for storing an aluminum sheet; taking the aluminum sheet from the locating sheet then transferring the aluminum sheet to the pre etching reaction chamber; plasma bombarding the aluminum sheet in the pre etching reaction chamber; and transferring the aluminum sheet back to the locating frame after a layer of aluminum is plated on an inner wall of the pre etching reacting cavity.
    Type: Application
    Filed: April 10, 2018
    Publication date: October 10, 2019
    Inventors: Chen-Feng Li, Wei-Liang Chan, Kuo-Yang Ma, Ching-Liang I, Yu-Hung Huang