Patents by Inventor Kuo-Hsien Liao

Kuo-Hsien Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10910329
    Abstract: The disclosure relates to a semiconductor package device. The semiconductor package device includes a substrate, a waveguide component, a package body, a first dielectric layer, an antenna pattern, and an antenna feeding layer. The waveguide component is on the substrate. The package body is on the substrate and encapsulates the waveguide component. The first dielectric layer is on the package body and has a first surface and a second surface adjacent to the package body and opposite to the first surface. The antenna pattern is on the first surface of the first dielectric layer. The antenna feeding layer is on the second surface of the first dielectric layer.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: February 2, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Kuo-Hsien Liao, Alex Chi-Hong Chan
  • Patent number: 10784208
    Abstract: The present disclosure provides a semiconductor package device and a method for manufacturing the same. In embodiments of the present disclosure, a semiconductor package device includes a carrier, a first antenna, a second antenna, a package body and a first shield. The carrier includes an antenna area and a component area. The first antenna is formed on the antenna area. The second antenna extends from the antenna area and over the first antenna. The second antenna is electrically connected to the first antenna. The package body includes a first portion covering the component area and a second portion covering the antenna area. The first shield is conformally formed on the first portion of the package body and exposes the second portion of package body.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: September 22, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Kuo-Hsien Liao, Cheng-Nan Lin, Chieh-Chen Fu
  • Publication number: 20200185581
    Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.
    Type: Application
    Filed: December 6, 2019
    Publication date: June 11, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chanyuan LIU, Kuo-Hsien LIAO, Alex Chi-Hong CHAN, Fuh-Yuh SHIH
  • Publication number: 20200176394
    Abstract: A semiconductor package structure includes a substrate structure having a first surface and a second surface opposite to the first surface; at least two electronic components electrically connected to the first surface of the substrate structure; at least one shielding pad disposed on the first surface of the substrate structure; a plurality of vias connected to the at least one shielding pad; a plurality of shielding wirebonds disposed between the electronic components. Each of the shielding wirebonds includes a first bond and a second bond opposite to the first bond, the first bond and the second bond being electrically connected to the at least one shielding pad, and the vias being free from overlapping with any of the plurality of vias.
    Type: Application
    Filed: November 25, 2019
    Publication date: June 4, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chanyuan LIU, Han-Chee YEN, Kuo-Hsien LIAO, Alex Chi-Hong CHAN, Christophe Zinck
  • Patent number: 10431554
    Abstract: A semiconductor device package includes: (1) a carrier; (2) an electronic component disposed over a top surface of the carrier; (3) a package body disposed over the top surface of the carrier and covering the electronic component; and (4) a shield layer, including a first magnetically permeable layer disposed over the package body, a first electrically conductive layer disposed over the first magnetically permeable layer, and a second magnetically permeable layer disposed over the first electrically conductive layer. The first electrically conductive layer is interposed between the first magnetically permeable layer and the second magnetically permeable layer. A permeability of the first electrically conductive layer is different from a permeability of the first magnetically permeable layer and a permeability of the second magnetically permeable layer.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: October 1, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: I-Chia Lin, Chieh-Chen Fu, Kuo Hsien Liao, Cheng-Nan Lin
  • Publication number: 20180342470
    Abstract: The disclosure relates to a semiconductor package device. The semiconductor package device includes a substrate, a waveguide component, a package body, a first dielectric layer, an antenna pattern, and an antenna feeding layer. The waveguide component is on the substrate. The package body is on the substrate and encapsulates the waveguide component. The first dielectric layer is on the package body and has a first surface and a second surface adjacent to the package body and opposite to the first surface. The antenna pattern is on the first surface of the first dielectric layer. The antenna feeding layer is on the second surface of the first dielectric layer.
    Type: Application
    Filed: May 23, 2017
    Publication date: November 29, 2018
    Inventors: Kuo-Hsien LIAO, Alex Chi-Hong CHAN
  • Publication number: 20180158783
    Abstract: A semiconductor device package includes: (1) a carrier; (2) an electronic component disposed over a top surface of the carrier; (3) a package body disposed over the top surface of the carrier and covering the electronic component; and (4) a shield layer, including a first magnetically permeable layer disposed over the package body, a first electrically conductive layer disposed over the first magnetically permeable layer, and a second magnetically permeable layer disposed over the first electrically conductive layer. The first electrically conductive layer is interposed between the first magnetically permeable layer and the second magnetically permeable layer. A permeability of the first electrically conductive layer is different from a permeability of the first magnetically permeable layer and a permeability of the second magnetically permeable layer.
    Type: Application
    Filed: January 15, 2018
    Publication date: June 7, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: I-Chia LIN, Chieh-Chen FU, Kuo Hsien LIAO, Cheng-Nan LIN
  • Patent number: 9984983
    Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: May 29, 2018
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Sheng Chung, Kuo-Hsien Liao, Jin-Feng Yang, Chen-Yin Tai, Yung-I Yeh
  • Patent number: 9871005
    Abstract: A semiconductor device package includes a carrier, an electronic component disposed over a top surface of the carrier, and a package body disposed over the top surface of the carrier and covering the electronic component. The semiconductor device package further includes a shield layer, which in turn includes a first electrically conductive layer, a first magnetically permeable layer, and a second electrically conductive layer, where the first magnetically permeable layer is interposed between and directly contacts the first electrically conductive layer and the second electrically conductive layer.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: January 16, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: I-Chia Lin, Chieh-Chen Fu, Kuo Hsien Liao, Cheng-Nan Lin
  • Publication number: 20170200682
    Abstract: A semiconductor device package includes a carrier, an electronic component disposed over a top surface of the carrier, and a package body disposed over the top surface of the carrier and covering the electronic component. The semiconductor device package further includes a shield layer, which in turn includes a first electrically conductive layer, a first magnetically permeable layer, and a second electrically conductive layer, where the first magnetically permeable layer is interposed between and directly contacts the first electrically conductive layer and the second electrically conductive layer.
    Type: Application
    Filed: January 7, 2016
    Publication date: July 13, 2017
    Inventors: I-Chia LIN, Chieh-Chen FU, Kuo Hsien LIAO, Cheng-Nan LIN
  • Publication number: 20170077039
    Abstract: The present disclosure provides a semiconductor package device and a method for manufacturing the same. In embodiments of the present disclosure, a semiconductor package device includes a carrier, a first antenna, a second antenna, a package body and a first shield. The carrier includes an antenna area and a component area. The first antenna is formed on the antenna area. The second antenna extends from the antenna area and over the first antenna. The second antenna is electrically connected to the first antenna. The package body includes a first portion covering the component area and a second portion covering the antenna area. The first shield is conformally formed on the first portion of the package body and exposes the second portion of package body.
    Type: Application
    Filed: June 7, 2016
    Publication date: March 16, 2017
    Inventors: Kuo-Hsien Liao, Cheng-Nan Lin, Chieh-Chen Fu
  • Publication number: 20170012007
    Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.
    Type: Application
    Filed: September 21, 2016
    Publication date: January 12, 2017
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Sheng Chung, Kuo-Hsien Liao, Jin-Feng Yang, Chen-Yin Tai, Yung-I Yeh
  • Patent number: 9484313
    Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: November 1, 2016
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Sheng Chung, Kuo-Hsien Liao, Jin-Feng Yang, Chen-Yin Tai, Yung-I Yeh
  • Patent number: 9269673
    Abstract: A semiconductor device package includes a substrate, at least one component, a package body, a first conductive layer, a first shielding layer, a second shielding layer and a second conductive layer. The component is disposed on a first surface of the substrate. The package body is disposed on the first surface of the substrate and covers the component. The first conductive layer covers the package body and at least a portion of the substrate. The first shielding layer covers the first conductive layer and has a first thickness and includes a high conductivity material. The second shielding layer covers the first shielding layer and has a second thickness and includes a high permeability material. A ratio of the first thickness to the second thickness being in a range of 0.2 to 3. The second conductive layer covers the second shielding layer.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: February 23, 2016
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: I-Chia Lin, Chieh-Chen Fu, Kuo-Hsien Liao, Cheng-Nan Lin
  • Patent number: 9190367
    Abstract: The semiconductor package includes a substrate, a plurality of components, an interposer, an electrical interconnect and a first package body. The substrate has a first surface and a second surface opposite to the first surface. A first component is mounted on the first surface of the substrate, and a second component is mounted on the second surface of the substrate. The interposer has a first surface. The electrical interconnect connects the first surface of the interposer to the second surface of the substrate. The first package body is disposed on the second surface of the substrate and encapsulates the second component, the electrical interconnect and at least a portion of the interposer.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: November 17, 2015
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Kuo Hsien Liao, Ming-Chiang Lee, Cheng-Nan Lin
  • Patent number: 9070793
    Abstract: The semiconductor device package includes a conformal shield layer applied to the exterior surface of the encapsulant, and an internal fence or separation structure embedded in the encapsulant. The fence separates the package into various compartments, with each compartment containing at least one die. The fence thus suppresses EMI between adjacent packages. The package further includes a ground path connected to the internal fence and conformal shield.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: June 30, 2015
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Kuo-Hsien Liao, Chi-Hong Chan, Jian-Cheng Chen, Chian-Her Ueng, Yu-Hsiang Sun
  • Patent number: 9007273
    Abstract: A semiconductor package integrated with conformal shield and antenna is provided. The semiconductor package includes a semiconductor element, an electromagnetic interference shielding element, a dielectric structure, an antenna element and an antenna signal feeding element. The electromagnetic interference shielding element includes an electromagnetic interference shielding film and a grounding element, wherein the electromagnetic interference shielding film covers the semiconductor element and the grounding element is electrically connected to the electromagnetic interference shielding layer and a grounding segment of the semiconductor element. The dielectric structure covers a part of the electromagnetic interference shielding element and has an upper surface. The antenna element is formed adjacent to the upper surface of the dielectric structure. The antenna signal feeding element passing through the dielectric structure electrically connects the antenna element and the semiconductor element.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: April 14, 2015
    Assignee: Advances Semiconductor Engineering, Inc.
    Inventors: Kuo-Hsien Liao, Chi-Hong Chan, Shih Fuyu
  • Publication number: 20140239464
    Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.
    Type: Application
    Filed: February 27, 2013
    Publication date: August 28, 2014
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Sheng Chung, Kuo-Hsien Liao, Jin-Feng Yang, Chen-Yin Tai, Yung-I Yeh
  • Patent number: D849119
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: May 21, 2019
    Assignee: TDK TAIWAN CORP.
    Inventors: Shang-Yu Hsu, Yi-Ho Chen, Shih-Ting Huang, Yu-Huai Liao, Yi-Hsin Nieh, Shao-Chung Chang, Kuo-Chun Kao, Shin-Hua Chen, Kuan-Hung Chen, Chen-Hsien Fan
  • Patent number: D850514
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: June 4, 2019
    Assignee: TDK TAIWAN CORP.
    Inventors: Shang-Yu Hsu, Yi-Ho Chen, Shih-Ting Huang, Yu-Huai Liao, Yi-Hsin Nieh, Shao-Chung Chang, Kuo-Chun Kao, Shin-Hua Chen, Kuan-Hung Chen, Chen-Hsien Fan