Abstract: A method of forming a FinFET is disclosed. The method includes depositing a conductive material across each of a number of adjacent fins, depositing a sacrificial mask over the conductive material, patterning the conductive material with the sacrificial mask to form a plurality of conductive material segments, depositing a sacrificial layer over the sacrificial mask, and patterning the sacrificial layer, where a portion of the patterned sacrificial layer remains over the sacrificial mask, where a portion of the sacrificial mask is exposed, and where the exposed portion of the sacrificial mask extends across each of the adjacent fins. The method also includes removing the portion of the sacrificial layer over the sacrificial mask, after removing the portion of the sacrificial layer over the sacrificial mask, removing the sacrificial mask, epitaxially growing a plurality of source/drain regions from the semiconductor substrate, and electrically connecting the source/drain regions to other devices.

Abstract: A package substrate comprises first, second and third electrical test contacts, wherein the package substrate is provided with an upper element plane and a lower SMD electrode plane on two sides. The side edge of the upper element plane is provided with first and second electrodes of the main element and first and second electrodes of the secondary element. The main element of LED chip is electrically connected between the first and second electrodes of the main element, a parallel circuit secondary element is electrically connected between the first and second electrodes of the secondary element. The electrical characteristics of the main element of LED chip and the parallel circuit secondary element are measured through the first, second, and third electrical test contacts when electrically connected.

Abstract: The invention comprises a light emitting diode chip and a package substrate. The light emitting diode chip is provided with a semiconductor epitaxial structure, a lateral extending interface structure, a chip conductive structure, an N-type electrode located above the semiconductor epitaxial structure and a P-type bypass detection electrode located on the lateral extending interface structure. The chip conductive structure is provided with a P-type main electrode located on a lower side. The package substrate comprises a plurality of electrode contacts through which the N-type electrode, the P-type bypass detection electrode and the P-type main electrode are connected, and a process quality of a alternative substrate adhesive layer in one of the semiconductor epitaxial structure and the chip conductive structure and a chip-substrate bonding adhesive layer between the P-type main electrode and the package substrate is evaluated by detecting electrical characteristics.

Abstract: The invention provides a chip structure of a micro light-emitting diode display, comprising a package substrate, at least one light-emitting diode (LED) element, at least one metal oxide semiconductor field effect transistor (MOSFET), and a connection line. The LED element and the MOSFET are positioned on the package substrate, and each MOSFET comprises a source connected with the input voltage in common, a gate connected with a main control circuit, and a drain. An end of the LED element is connected with the drain of the MOSFET through the connection line, and the other end of the LED element is independently connected with a source drive circuit. Therefore, the MOSFET is provided on the package substrate and integrated in a chip structure, so as to achieve a better heat dissipation effect and requirements of high density and brightness.

Abstract: Disclosed is a small-size vertical-type light emitting diode chip with high luminous in a central region. A PN junction structure is arranged on a light emitting region base of an interface structure, the interface structure is provided with a P-type Ohmic contact area at the light emitting region base, a central area of the PN junction structure is above the P-type Ohmic contact area, an insulating layer is formed on an extending platform adjacent to the light emitting region base and extends to cover an N-type semiconductor of the PN junction structure to form a border covering region surrounding the N-type semiconductor, an N-type Ohmic contact electrode covers the border covering region, and an N-type electrode pad is arranged on the insulating layer and electrically connected with the N-type Ohmic contact electrode via a bridging connected metal layer.

Abstract: The invention is a small-sized vertical light emitting diode chip with high energy efficiency, wherein a PN junction structure is arranged on a light-emitting region platform of an interface structure; a highly reflective metal layer is arranged under the light-emitting region platform; the interface structure is provided with a P-type ohmic contact area under an outwardly extending platform adjacent to the light-emitting region platform; an insulating layer is formed on the outwardly extending platform; an N-type ohmic contact electrode is in ohmic contact with the PN junction structure and covers the border covering region at a position opposite to the outwardly extending platform; the current conduction is achieved diagonally on the opposite sides by locally diagonally symmetric geometric positioning of the N-type ohmic contact electrode and the P-type ohmic contact area.

Abstract: The invention relates to a vertical light-emitting diode chip structure capable of measuring temperature and a temperature measurement calibration method thereof. A semiconductor epitaxial structure and a metal film resistance temperature measurement structure are separately arranged on the upper plane of a transverse high thermal conductivity extension structure. Through the high thermal conductivity characteristic of the transverse high thermal conductivity extension structure, the temperature of an active layer of the semiconductor epitaxial structure can be quickly transferred to the metal film resistance temperature measurement structure. The temperature measurement calibration method comprises: placing a plurality of connected and uncut package support plates into a constant temperature device at the same time to obtain a temperature calibration relation for different package support plates at the same time to reduce the temperature calibration cost in a batch mass production mode.

Abstract: The invention provides an automotive lighting unit for detecting electrical characteristics of light emitter diode component. At least one light emitter diode light source is selectively disposed on any one of at least one circuit channel of at least one drive power loop. At least one circuit breaker comprises at least one circuit switch corresponding to the at least one drive power loop, and is disposed on the circuit channel with the at least one light emitter diode light source. The at least one circuit channel is controlled by the at least one circuit switch to turn in a state of isolating from a drive power. An ammeter connection line is connected with the two sides one of the at least one light emitter diode light source.

Abstract: The invention provides a light-emitting diode grain structure with multiple contact points, including a P-type electrode, a conductive base plate, a light-emitting semiconductor layer, a plurality of ohmic contact metal points, a mesh-structured connection conductive layer, a connection point conductive layer, and an N-type electrode pad electrically connected to the connection point conductive layer. The plurality of ohmic contact metal points is arranged on an N-type semiconductor layer in a spreading manner, and is contacted with the N-type semiconductor layer. No ohmic contact is formed between the connection conductive layer and the N-type semiconductor layer. Accordingly, the metal points and the connection conductive layer can disperse a current, reduce a shading area, and improve the luminous efficiency and component reliability; and uniform light emission from a surface facilitates the light distribution uniformity of an original light source and exciting light after phosphor is coated.

Abstract: The invention comprises a light emitting diode chip and a package substrate. The light emitting diode chip is provided with a semiconductor epitaxial structure, a lateral extending interface structure, a chip conductive structure, an N-type electrode located above the semiconductor epitaxial structure and a P-type bypass detection electrode located on the lateral extending interface structure. The chip conductive structure is provided with a P-type main electrode located on a lower side. The package substrate comprises a plurality of electrode contacts through which the N-type electrode, the P-type bypass detection electrode and the P-type main electrode are connected, and a process quality of a alternative substrate adhesive layer in one of the semiconductor epitaxial structure and the chip conductive structure and a chip-substrate bonding adhesive layer between the P-type main electrode and the package substrate is evaluated by detecting electrical characteristics.

Abstract: A package substrate comprises first, second and third electrical test contacts, wherein the package substrate is provided with an upper element plane and a lower SMD electrode plane on two sides. The side edge of the upper element plane is provided with first and second electrodes of the main element and first and second electrodes of the secondary element. The main element of LED chip is electrically connected between the first and second electrodes of the main element, a parallel circuit secondary element is electrically connected between the first and second electrodes of the secondary element. The electrical characteristics of the main element of LED chip and the parallel circuit secondary element are measured through the first, second, and third electrical test contacts when electrically connected.

Abstract: A vertical light emitting diode structure with high current dispersion and high reliability comprises a conductive substrate with a central region and a side region; a light emitting semiconductor layer is disposed on the central region; an ohmic contact metal layer is disposed at a center of the light emitting semiconductor layer; an N-type electrode is disposed at the side region and is connected with the ohmic contact metal layer and the N-type electrode through an N-type electrode bridging structure; a working current is diffused from the center of the light emitting semiconductor layer to have high current dispersion, so that the problem of heat dissipation of local high current caused by the design that the N-type electrode is disposed on the edge can be solved.

Abstract: The invention provides a light-emitting diode grain structure with multiple contact points, including a P-type electrode, a conductive base plate, a light-emitting semiconductor layer, a plurality of ohmic contact metal points, a mesh-structured connection conductive layer, a connection point conductive layer, and an N-type electrode pad electrically connected to the connection point conductive layer. The plurality of ohmic contact metal points is arranged on an N-type semiconductor layer in a spreading manner, and is contacted with the N-type semiconductor layer. No ohmic contact is formed between the connection conductive layer and the N-type semiconductor layer. Accordingly, the metal points and the connection conductive layer can disperse a current, reduce a shading area, and improve the luminous efficiency and component reliability; and uniform light emission from a surface facilitates the light distribution uniformity of an original light source and exciting light after phosphor is coated.

Abstract: A flip-chip light-emitting diode structure capable of emitting trichromatic spectrum and a manufacturing method thereof, including a blue-green light layer with a light-stimulated green light-emitting structure and an electron-stimulated blue light-emitting structure, a bonding layer and a red light layer with a light-stimulated red light-emitting structure. The manufacturing method uses a sapphire bonding layer as the bonding layer, and forming the blue-green light layer and the red light layer by growing epitaxy on two sides of the sapphire bonding layer; or, after growing the blue-green light layer and the red light layer by epitaxy respectively, uses the bonding layer to connect.

Abstract: A vertical light emitting diode structure with high current dispersion and high reliability comprises a conductive substrate with a central region and a side region; a light emitting semiconductor layer is disposed on the central region; an ohmic contact metal layer is disposed at a center of the light emitting semiconductor layer; an N-type electrode is disposed at the side region and is connected with the ohmic contact metal layer and the N-type electrode through an N-type electrode bridging structure; a working current is diffused from the center of the light emitting semiconductor layer to have high current dispersion, so that the problem of heat dissipation of local high current caused by the design that the N-type electrode is disposed on the edge can be solved.

Abstract: The invention provides a chip structure of a micro light-emitting diode display, comprising a package substrate, at least one light-emitting diode (LED) element, at least one metal oxide semiconductor field effect transistor (MOSFET), and a connection line. The LED element and the MOSFET are positioned on the package substrate, and each MOSFET comprises a source connected with the input voltage in common, a gate connected with a main control circuit, and a drain. An end of the LED element is connected with the drain of the MOSFET through the connection line, and the other end of the LED element is independently connected with a source drive circuit. Therefore, the MOSFET is provided on the package substrate and integrated in a chip structure, so as to achieve a better heat dissipation effect and requirements of high density and brightness.

Abstract: A light-emitting diode chip structure comprising a substrate; a metal contact layer disposed on the substrate; a light-emitting semiconductor layer disposed on the metal contact layer; an insulating protective layer covering the metal contact layer and the light-emitting diode semiconductor layer. The insulating protective layer includes a first opening that exposes the light-emitting semiconductor layer and a second opening that exposes the metal contact layer. The metal conductive layer with one end passing through the first opening to be electrically connected to the light-emitting semiconductor layer, and the other end of the metal conductive layer extended on the insulating protective layer. A first electrode pad and a second electrode pad are respectively located on lateral sides of the light-emitting semiconductor layer and respectively disposed on the metal conductive layer and passing through the second opening to be disposed on the metal contact layer.

Abstract: A vertical light-emitting diode structure with a metal layer capable of testing and protecting sidewalls comprises a light-emitting diode element, a sidewall passivation layer, a welding electrode and a metal protective layer, which mainly allows the metal protective layer to be electrically connected to the welding electrode, and the metal protective layer covers and protects a chip side edge and a carrier board side edge of the light-emitting diode element with the sidewall passivation layer in between. Accordingly, through coating and protection of the metal protective layer, the problem of potential failure of the sidewall passivation layer of the light-emitting diode element during electroplating, electroless plating process or other environmentally rigorous processes can be solved, and the metal protective layer can provide test contacts, a quality of the sidewall passivation layer is evaluated by detecting forward bias (Vf) and reverse leakage current (Ir) of the light-emitting diode element.

Abstract: A three-in-one RGB mini-LED device includes a substrate, a second electrical semiconductor layer, a plurality of multiple-quantum well layers, a plurality of first electrical semiconductor layers, and a plurality of mirrors. The second electrical semiconductor layer is disposed on the substrate. The plurality of multiple-quantum well layers are disposed on the second electrical semiconductor layer. An area of each of the plurality of multiple-quantum well layers is smaller than an area of the second electrical semiconductor layer, and a region on the second semiconductor layer is not covered by the plurality of multiple-quantum well layers.

Abstract: A surface light source LED device includes a circuit board, at least one power input and at least two LED bar elements, the at least two LED bar elements are arranged in a staggered manner, and each of the LED bar elements includes a plurality of LED bars arranged linearly on the circuit board. Each of the LED bars has a straight strip structure and has a plurality of LED dies of the same type provided inside. The plurality of LED dies is arranged linearly at equal intervals.