Patents by Inventor Kushal Datta
Kushal Datta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230114468Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.Type: ApplicationFiled: September 12, 2022Publication date: April 13, 2023Applicant: Intel CorporationInventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
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Patent number: 11450123Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.Type: GrantFiled: July 13, 2021Date of Patent: September 20, 2022Assignee: Intel CorporationInventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
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Publication number: 20220180651Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.Type: ApplicationFiled: July 13, 2021Publication date: June 9, 2022Applicant: Intel CorporationInventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
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Patent number: 11068757Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.Type: GrantFiled: September 26, 2018Date of Patent: July 20, 2021Assignee: Intel CorporationInventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
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Patent number: 11029971Abstract: Systems, apparatuses and methods may provide for technology that identifies a first set of compute nodes and a second set of compute nodes, wherein the first set of compute nodes execute more slowly than the second set of compute nodes. The technology may also automatically determine a compute node configuration that results in a relatively low difference in completion time between the first set of compute nodes and the second set of compute nodes with respect to a neural network workload. In an example, the technology applies the compute node configuration to an execution of the neural network workload on one or more nodes in the first set of compute nodes and one or more nodes in the second set of compute nodes.Type: GrantFiled: January 28, 2019Date of Patent: June 8, 2021Assignee: Intel CorporationInventors: Meenakshi Arunachalam, Kushal Datta, Vikram Saletore, Vishal Verma, Deepthi Karkada, Vamsi Sripathi, Rahul Khanna, Mohan Kumar
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Publication number: 20200250003Abstract: In one embodiment, an apparatus comprises a processor to: identify a workload comprising a plurality of tasks; generate a workload graph based on the workload, wherein the workload graph comprises information associated with the plurality of tasks; identify a device connectivity graph, wherein the device connectivity graph comprises device connectivity information associated with a plurality of processing devices; identify a privacy policy associated with the workload; identify privacy level information associated with the plurality of processing devices; identify a privacy constraint based on the privacy policy and the privacy level information; and determine a workload schedule, wherein the workload schedule comprises a mapping of the workload onto the plurality of processing devices, and wherein the workload schedule is determined based on the privacy constraint, the workload graph, and the device connectivity graph.Type: ApplicationFiled: June 29, 2018Publication date: August 6, 2020Applicant: Intel CorporationInventors: Shao-Wen Yang, Yen-Kuang Chen, Ragaad Mohammed Irsehid Altarawneh, Juan Pablo Munoz Chiabrando, Siew Wen Chin, Kushal Datta, Subramanya R. Dulloor, Julio C. Zamora Esquivel, Omar Ulises Florez Choque, Vishakha Gupta, Scott D. Hahn, Rameshkumar Illikkal, Nilesh Kumar Jain, Siti Khairuni Amalina Kamarol, Anil S. Keshavamurthy, Heng Kar Lau, Jonathan A. Lefman, Yiting Liao, Michael G. Millsap, Ibrahima J. Ndiour, Luis Carlos Maria Remis, Addicam V. Sanjay, Usman Sarwar, Eve M. Schooler, Ned M. Smith, Vallabhajosyula S. Somayazulu, Christina R. Strong, Omesh Tickoo, Srenivas Varadarajan, Jesús A. Cruz Vargas, Hassnaa Moustafa, Arun Raghunath, Katalin Klara Bartfai-Walcott, Maruti Gupta Hyde, Deepak S. Vembar, Jessica McCarthy
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Patent number: 10417280Abstract: A method, computing system, and computer-readable medium for assigning global edge IDs for evolving graphs are described herein. The method includes selecting a block size for an evolving graph and, as new vertices are added to the evolving graph, calculating block IDs for the evolving graph. Calculating the block IDs includes creating a table representing the evolving graph and, as new vertices are added to the evolving graph, calculating block IDs for cells in a new column of the table before calculating block IDs for cells in a new row of the table. The method also includes calculating global edge IDs for the evolving graph based on the source vertex ID, the target vertex ID, and the block ID for the block at which each edge is located. The method may also include calculating incremental Page Rank for the evolving graph.Type: GrantFiled: December 23, 2014Date of Patent: September 17, 2019Assignee: Intel CorporationInventors: Xia Zhu, Theodore L. Willke, Bryn Keller, Shih-Chi Chen, Kushal Datta
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Publication number: 20190155620Abstract: Systems, apparatuses and methods may provide for technology that identifies a first set of compute nodes and a second set of compute nodes, wherein the first set of compute nodes execute more slowly than the second set of compute nodes. The technology may also automatically determine a compute node configuration that results in a relatively low difference in completion time between the first set of compute nodes and the second set of compute nodes with respect to a neural network workload. In an example, the technology applies the compute node configuration to an execution of the neural network workload on one or more nodes in the first set of compute nodes and one or more nodes in the second set of compute nodes.Type: ApplicationFiled: January 28, 2019Publication date: May 23, 2019Inventors: Meenakshi Arunachalam, Kushal Datta, Vikram Saletore, Vishal Verma, Deepthi Karkada, Vamsi Sripathi, Rahul Khanna, Mohan Kumar
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Publication number: 20190043201Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.Type: ApplicationFiled: September 26, 2018Publication date: February 7, 2019Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
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Patent number: 10152558Abstract: A system and method for orchestrating a table operation of data with a graph operation of the data using columnar stores. The orchestration includes storing vertices and edges as collections of tables by type, and supporting the columnar stores with different storage characteristics. The techniques may also include a graph query optimizer that combines chained operators of a graph query; and/or the graph query executed via an in-memory distributed query execution engine.Type: GrantFiled: December 23, 2014Date of Patent: December 11, 2018Assignee: Intel CorporationInventors: Todd Lisobee, Soila P. Kavulya, Bryn Keller, Briton L. Barker, Kushal Datta, Xia Zhu, Theodore L. Willke
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Publication number: 20160179980Abstract: A method, computing system, and computer-readable medium for assigning global edge IDs for evolving graphs are described herein. The method includes selecting a block size for an evolving graph and, as new vertices are added to the evolving graph, calculating block IDs for the evolving graph. Calculating the block IDs includes creating a table representing the evolving graph and, as new vertices are added to the evolving graph, calculating block IDs for cells in a new column of the table before calculating block IDs for cells in a new row of the table. The method also includes calculating global edge IDs for the evolving graph based on the source vertex ID, the target vertex ID, and the block ID for the block at which each edge is located. The method may also include calculating incremental Page Rank for the evolving graph.Type: ApplicationFiled: December 23, 2014Publication date: June 23, 2016Applicant: Intel CorporationInventors: Xia Zhu, Theodore L. Willke, Bryn Keller, Shih-Chi Chen, Kushal Datta
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Publication number: 20160179887Abstract: A system and method for orchestrating a table operation of data with a graph operation of the data using columnar stores. The orchestration includes storing vertices and edges as collections of tables by type, and supporting the columnar stores with different storage characteristics. The techniques may also include a graph query optimizer that combines chained operators of a graph query; and/or the graph query executed via an in-memory distributed query execution engine.Type: ApplicationFiled: December 23, 2014Publication date: June 23, 2016Applicant: INTEL CORPORATIONInventors: Todd Lisonbee, Soila P. Kavulya, Bryn Keller, Briton L. Barker, Kushal Datta, Xia Zhu, Theodore L. Willke
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Patent number: 9342376Abstract: A method, system, and device for energy efficient job scheduling in a datacenter computing environment includes a master node. The master node can periodically receive energy data from slave nodes and dynamically assign computing tasks to be executed by the slave nodes based on the energy data.Type: GrantFiled: June 27, 2012Date of Patent: May 17, 2016Assignee: Intel CorporationInventors: Nilesh K. Jain, Theodore L. Willke, Kushal Datta, Nezih Yigitbasi
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Publication number: 20140122546Abstract: The present disclosure describes tuning for distributed data and storage and processing systems. A device may comprise a tuner module configured to determine a distributed data and storage and processing system configuration based at least on configuration information available in the device, and to adjust the distributed data and storage and processing system configuration based on a baseline configuration. The tuner module may be further configured to then determine sample information for the distributed data and storage and processing systems derived from actual distributed data and storage and processing system operation, and to use the sample information in creating a performance model of the distributed data and storage and processing system. The tuner module may be further configured to then evaluate configuration changes to the system based on the performance model, and to determine a recommended distributed data and storage and processing system configuration based on the evaluation.Type: ApplicationFiled: October 30, 2012Publication date: May 1, 2014Inventors: Guangdeng D. Liao, Nezih Yigitbasi, Theodore Willke, Kushal Datta
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Publication number: 20140006534Abstract: A method, system, and device for energy efficient job scheduling in a datacenter computing environment includes a master node. The master node can periodically receive energy data from slave nodes and dynamically assign computing tasks to be executed by the slave nodes based on the energy data.Type: ApplicationFiled: June 27, 2012Publication date: January 2, 2014Inventors: Nilesh K. Jain, Theodore L. Willke, Kushal Datta, Nezih Yigitbasi