Patents by Inventor Kwan-Woo Do

Kwan-Woo Do has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220359643
    Abstract: Embodiments of the present invention provide a semiconductor device capable of improving current leakage property and a method for fabricating the same. According to an embodiment of the present invention, a capacitor comprises: a lower electrode; a dielectric layer over the lower electrode; and an upper electrode over the dielectric layer, the upper electrode including a conductive carbon-containing layer, wherein a carbon content in the conductive carbon-containing layer is more than 5 at % and equal to or less than 10 at %.
    Type: Application
    Filed: November 2, 2021
    Publication date: November 10, 2022
    Inventors: Kwan Woo DO, Wan Joo MAENG, Jeong Yeop LEE, Ki Vin IM
  • Patent number: 9847297
    Abstract: This patent document provides an electronic device including a semiconductor memory that can simplify a fabrication process and improve characteristics of a variable resistance element, and a method for fabricating the same.
    Type: Grant
    Filed: September 6, 2015
    Date of Patent: December 19, 2017
    Assignee: SK hynix Inc.
    Inventor: Kwan-Woo Do
  • Patent number: 9619392
    Abstract: An electronic device includes a semiconductor memory that includes: a variable resistance element formed over a substrate; and a carbon-containing aluminum nitride layer formed on sidewalls and in an upper portion of the variable resistance element.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: April 11, 2017
    Assignee: SK hynix Inc.
    Inventors: Kwan-Woo Do, Ki-Seon Park, Ga-Young Ha, Gil-Jae Park
  • Patent number: 9614008
    Abstract: An electronic device includes a semiconductor memory that includes: an inter-layer dielectric layer which is formed over a substrate; a contact plug which is coupled with the substrate by passing through the inter-layer dielectric layer and has a protruding portion over the inter-layer dielectric layer; a first variable resistance pattern which is formed over the contact plug; and a protective layer which covers the first variable resistance pattern and a portion of sidewalls of the contact plug in such a manner that the sidewalls of the contact plug are exposed.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: April 4, 2017
    Assignee: SK hynix Inc.
    Inventors: Kwan-Woo Do, Ki-Seon Park
  • Patent number: 9431402
    Abstract: A method for fabricating a semiconductor device includes: forming an insulation layer over a semiconductor substrate; forming a first conductive layer over the insulation layer; forming a plurality of buried bit lines and insulation layer patterns isolated by a plurality of trenches, wherein the plurality of trenches are formed by etching the first conductive layer and the insulation layer; forming a sacrificial layer to gap-fill the trenches; forming a second conductive layer over the buried bit lines and the sacrificial layer; and forming a plurality of pillars over each of the buried bit lines by etching the second conductive layer.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: August 30, 2016
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yun-Hyuck Ji, Kwan-Woo Do, Beom-Yong Kim, Seung-Mi Lee, Woo-Young Park
  • Publication number: 20160181204
    Abstract: This patent document provides an electronic device including a semiconductor memory that can simplify a fabrication process and improve characteristics of a variable resistance element, and a method for fabricating the same.
    Type: Application
    Filed: September 6, 2015
    Publication date: June 23, 2016
    Inventor: Kwan-Woo Do
  • Publication number: 20160111472
    Abstract: An electronic device includes a semiconductor memory that includes: an inter-layer dielectric layer which is formed over a substrate; a contact plug which is coupled with the substrate by passing through the inter-layer dielectric layer and has a protruding portion over the inter-layer dielectric layer; a first variable resistance pattern which is formed over the contact plug; and a protective layer which covers the first variable resistance pattern and a portion of sidewalls of the contact plug in such a manner that the sidewalls of the contact plug are exposed.
    Type: Application
    Filed: December 28, 2015
    Publication date: April 21, 2016
    Inventors: Kwan-Woo Do, Ki-Seon Park
  • Publication number: 20160079524
    Abstract: An electronic device includes a semiconductor memory that includes: a variable resistance element formed over a substrate; and a carbon-containing aluminum nitride layer formed on sidewalls and in an upper portion of the variable resistance element.
    Type: Application
    Filed: April 14, 2015
    Publication date: March 17, 2016
    Inventors: Kwan-Woo Do, Ki-Seon Park, Ga-Young Ha, Gil-Jae Park
  • Patent number: 9224785
    Abstract: An electronic device includes a semiconductor memory that includes: an inter-layer dielectric layer which is formed over a substrate; a contact plug which is coupled with the substrate by passing through the inter-layer dielectric layer and has a protruding portion over the inter-layer dielectric layer; a first variable resistance pattern which is formed over the contact plug; and a protective layer which covers the first variable resistance pattern and a portion of sidewalls of the contact plug in such a manner that the sidewalls of the contact plug are exposed.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: December 29, 2015
    Assignee: SK HYNIX, INC.
    Inventors: Kwan-Woo Do, Ki-Seon Park
  • Publication number: 20150249110
    Abstract: An electronic device includes a semiconductor memory that includes: an inter-layer dielectric layer which is formed over a substrate; a contact plug which is coupled with the substrate by passing through the inter-layer dielectric layer and has a protruding portion over the inter-layer dielectric layer; a first variable resistance pattern which is formed over the contact plug; and a protective layer which covers the first variable resistance pattern and a portion of sidewalls of the contact plug in such a manner that the sidewalls of the contact plug are exposed.
    Type: Application
    Filed: December 30, 2014
    Publication date: September 3, 2015
    Inventors: Kwan-Woo Do, Ki-Seon Park
  • Patent number: 8962437
    Abstract: A method for fabricating a capacitor includes: forming a first silicon layer over a semiconductor substrate, where the first silicon layer is doped with a dopant; forming an undoped second silicon layer over the first silicon layer; forming an opening by etching the second silicon layer and the first silicon layer; forming a storage node in the opening; and removing the first silicon layer and the second silicon layer.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: February 24, 2015
    Assignee: SK Hynix Inc.
    Inventors: Beom-Yong Kim, Kee-Jeung Lee, Yun-Hyuck Ji, Seung-Mi Lee, Jae-Hyoung Koo, Kwan-Woo Do, Kyung-Woong Park, Ji-Hoon Ahn, Woo-Young Park
  • Publication number: 20140269039
    Abstract: A variable resistance element includes: first and second magnetic layers having a lanthanide series element alloyed in a nickel-iron compound; and a tunnel barrier layer interposed between the first and second magnetic layers.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Applicant: SK HYNIX INC.
    Inventors: Kwan-Woo Do, Ki-Seon Park, Bo-Mi Lee, Woon-Joon Choi, Sung-Joon Yoon, Guk-Cheon Kim
  • Publication number: 20130244394
    Abstract: A method for fabricating a capacitor includes: forming a first silicon layer over a semiconductor substrate, where the first silicon layer is doped with a dopant; forming an undoped second silicon layer over the first silicon layer; forming an opening by etching the second silicon layer and the first silicon layer; forming a storage node in the opening; and removing the first silicon layer and the second silicon layer.
    Type: Application
    Filed: June 12, 2012
    Publication date: September 19, 2013
    Inventors: Beom-Yong KIM, Kee-Jeung LEE, Yun-Hyuck JI, Seung-Mi LEE, Jae-Hyoung KOO, Kwan-Woo DO, Kyung-Woong PARK, Ji-Hoon AHN, Woo-Young PARK
  • Publication number: 20130171797
    Abstract: A method of forming a multi-component dielectric layer on the surface of a substrate by atomic layer deposition includes injecting a cocktail source of a plurality of sources at least having a cyclopentadienyl ligand, wherein the cocktail source is adsorbed on a surface of a substrate by injecting the cocktail source, performing a first purge process to remove a non-adsorbed portion of the cocktail source, injecting a reactant to react with the adsorbed cocktail source, wherein a multi-component layer is formed by the reaction between the reactant and the absorbed cocktail source, and performing a second purge process to remove reaction byproducts and an unreacted portion of the reactant.
    Type: Application
    Filed: May 3, 2012
    Publication date: July 4, 2013
    Inventors: Kyung-Woong PARK, Kee-Jeung LEE, Jae-Hyoung KOO, Kwan-Woo DO, Ji-Hoon AHN, Woo-Young PARK
  • Publication number: 20130161710
    Abstract: A method for fabricating a semiconductor device includes: forming an insulation layer over a semiconductor substrate; forming a first conductive layer over the insulation layer; forming a plurality of buried bit lines and insulation layer patterns isolated by a plurality of trenches, wherein the plurality of trenches are formed by etching the first conductive layer and the insulation layer; forming a sacrificial layer to gap-fill the trenches; forming a second conductive layer over the buried bit lines and the sacrificial layer; and forming a plurality of pillars over each of the buried bit lines by etching the second conductive layer.
    Type: Application
    Filed: May 10, 2012
    Publication date: June 27, 2013
    Inventors: Yun-Hyuck Ji, Kwan-Woo Do, Beom-Yong Kim, Seung-Mi Lee, Woo-Young Park
  • Patent number: 8441100
    Abstract: A capacitor includes a pillar-type storage node, a supporter disposed entirely within an inner empty crevice of the storage node, a conductive capping layer over the supporter and contacting the storage node so as to seal an entrance to the inner empty crevice, a dielectric layer over the storage node, and a plate node over the dielectric layer.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: May 14, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kee-Jeung Lee, Han-Sang Song, Deok-Sin Kil, Young-Dae Kim, Jin-Hyock Kim, Kwan-Woo Do, Kyung-Woong Park
  • Patent number: 8372746
    Abstract: An electrode of a semiconductor device includes a TiCN layer and a TiN layer. A method for fabricating an electrode of a semiconductor device includes preparing a substrate, forming a TiCN layer, and forming a TiN layer.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: February 12, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kwan-Woo Do, Kee-Jeung Lee, Kyung-Woong Park, Jeong-Yeop Lee
  • Publication number: 20130022744
    Abstract: A noble metal layer is formed using ozone (O3) as a reaction gas.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 24, 2013
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Deok-Sin KIL, Kee-Jeung LEE, Young-Dae KIM, Jin-Hyock KIM, Kwan-Woo DO, Kyung-Woong PARK, Jeong-Yeop LEE, Ja-Yong KIM
  • Patent number: 8319296
    Abstract: In a semiconductor device including a carbon-containing electrode and a method for fabricating the same, an electrode has a high work function due to a carbon-containing TiN layer contained therein. It is possible to provide a dielectric layer having a high permittivity and thus to reduce the leakage current by forming an electrode having a high work function. Also, sufficient capacitance of a capacitor can be secured by employing an electrode having a high work function and a dielectric layer having a high permittivity.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: November 27, 2012
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Kwan-Woo Do, Kee-Jeung Lee, Young-Dae Kim, Mi-Hyoung Lee, Jeong-Yeop Lee
  • Publication number: 20120273921
    Abstract: A semiconductor device includes a dielectric layer, where the dielectric layer includes a metal oxide layer, a metal nitride carbide layer including hydrogen therein, and a reduction prevention layer inserted between the metal nitride carbide layer and the dielectric layer.
    Type: Application
    Filed: December 21, 2011
    Publication date: November 1, 2012
    Inventors: Kwan-Woo DO, Kee-Jeung Lee, Kyung-Woong Park, Kun-Hoon Baek, Ji-Hoon Ahn, Woo-Young Park