Patents by Inventor Kwang-Ming Lin

Kwang-Ming Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770602
    Abstract: An optical sensor includes pixels disposed in a substrate and a light collimating layer disposed on the substrate. The light collimating layer includes a first light-shielding layer, first transparent pillars, a second light-shielding layer, and second transparent pillars. The first light-shielding layer is disposed on the substrate. The first transparent pillars through the first light-shielding layer are correspondingly disposed on the pixels. The second light-shielding layer is disposed on the first light-shielding layer and the first transparent pillars. The second transparent pillars through the second light-shielding layer are correspondingly disposed on the first transparent pillars. The top surface area of each of the first transparent pillars is not equal to the bottom surface area of each of the second transparent pillars.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: September 8, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Patent number: 10763288
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate. The substrate includes a plurality of pixels. The semiconductor device also includes a light collimator layer disposed on the substrate. The light collimator layer includes a transparent connection feature disposed on the substrate, and a plurality of transparent pillars disposed on the transparent connection feature. The plurality of transparent pillars cover the plurality of pixels, and the transparent connection feature connects to the plurality of transparent pillars. The plurality of transparent pillars and the transparent connection feature are made of a first material which includes a transparent material. The light collimator layer also includes a plurality of first light-shielding features disposed on the transparent connection feature. The top surface of one of the transparent pillars is level with the top surface of one of the first light-shielding features.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 1, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Publication number: 20200266226
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate. The substrate includes a plurality of pixels. The semiconductor device also includes a light collimator layer disposed on the substrate. The light collimator layer includes a transparent connection feature disposed on the substrate, and a plurality of transparent pillars disposed on the transparent connection feature. The plurality of transparent pillars cover the plurality of pixels, and the transparent connection feature connects to the plurality of transparent pillars. The plurality of transparent pillars and the transparent connection feature are made of a first material which includes a transparent material. The light collimator layer also includes a plurality of first light-shielding features disposed on the transparent connection feature. The top surface of one of the transparent pillars is level with the top surface of one of the first light-shielding features.
    Type: Application
    Filed: February 15, 2019
    Publication date: August 20, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200266305
    Abstract: An optical sensor includes pixels disposed in a substrate and a light collimating layer disposed on the substrate. The light collimating layer includes a first light-shielding layer, first transparent pillars, a second light-shielding layer, and second transparent pillars. The first light-shielding layer is disposed on the substrate. The first transparent pillars through the first light-shielding layer are correspondingly disposed on the pixels. The second light-shielding layer is disposed on the first light-shielding layer and the first transparent pillars. The second transparent pillars through the second light-shielding layer are correspondingly disposed on the first transparent pillars. The top surface area of each of the first transparent pillars is not equal to the bottom surface area of each of the second transparent pillars.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 20, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200251506
    Abstract: An optical sensor includes pixels disposed in a substrate. A light collimating layer is disposed on the substrate and includes a transparent layer, a light-shielding layer, and transparent pillars. The transparent layer blanketly disposed on the substrate covers the pixels and the region between the pixels. The light-shielding layer is disposed on the transparent layer and between the transparent pillars. The transparent pillars penetrating through the light-shielding layer are correspondingly disposed on the pixels.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 6, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200249490
    Abstract: An optical sensor includes a plurality of pixels disposed in a substrate and a light collimating layer. The light collimating layer is disposed on the substrate. The light collimating layer includes a light-shielding layer, a plurality of transparent pillars, and a plurality of first dummy transparent pillars. The light-shielding layer is disposed on the substrate. The plurality of transparent pillars pass through the light-shielding layer and are disposed correspondingly on the plurality of pixels. The plurality of first dummy transparent pillars that pass through the light-shielding layer are disposed on a first peripheral region of the light collimating layer, wherein the plurality of first dummy transparent pillars surround the plurality of transparent pillars from a top view.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20190244560
    Abstract: A portable electronic device with large display screen-to-body includes a housing, a first display, a circuit board, and an optical module. The first display is a transparent display. The optical module is electrically connected to the circuit board and positioned below the first display. The first display, the optical module, and the circuit board are received in the housing, the optical module is configured to receive external light passing through the first display even as the first display is displaying images. Operating methods for the portable electronic device in various modes are also provided.
    Type: Application
    Filed: January 30, 2019
    Publication date: August 8, 2019
    Inventors: KWANG-PI LEE, SZU-TSO LIN, PO-CHING HUANG, CHIEH-MING CHENG, WEN-LUNG CHEN
  • Patent number: 9443943
    Abstract: The invention provides a semiconductor device. A buried layer is formed in a substrate. A first deep trench contact structure is formed in the substrate. The first deep trench contact structure comprises a conductor and a liner layer formed on a sidewall of the conductor. A bottom surface of the first deep trench contact structure is in contact with the buried layer.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: September 13, 2016
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Geeng-Lih Lin, Kwang-Ming Lin, Shang-Hui Tu, Jui-Chun Chang
  • Patent number: 9385260
    Abstract: A method for forming thin film solar cell materials introducing a first inert gas mixture that includes hydrogen selenide into a chamber at a first pressure value until the chamber reaches a second pressure value and at a first temperature value, wherein the second pressure value is a predefined percentage of the first pressure value. The temperature in the chamber is increased to a second temperature value for a selenization process so that the pressure in the chamber increases to a third pressure value. Residual gas that is generated during the selenization process can be removed from the chamber. A second inert gas mixture that includes hydrogen sulfide is added into the chamber until the chamber reaches a fourth pressure value. The temperature in the chamber is increased to a third temperature value for a sulfurization process. The chamber is cooled after the sulfurization process.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: July 5, 2016
    Assignee: TSMC Solar Ltd.
    Inventors: Kwang-Ming Lin, Chi-Wei Liu, Wen-Cheng Kuo
  • Patent number: 9142671
    Abstract: The invention provides a lateral double-diffused metal oxide semiconductor (LDMOS). The pre-metal dielectric layer (PMD) of the LDMOS is a silicon rich content material. Additionally, the inter-layer dielectric layer (ILD), inter-metal dielectric layer (IMD), or protective layer of the LDMOS may be formed of a silicon rich content material.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: September 22, 2015
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Kwang-Ming Lin, Ming-Cheng Lin, Yu-Long Chang
  • Patent number: 9112065
    Abstract: A method for encapsulating solar cells includes a curing step that renders CIGS or other types of solar cell absorber layers resistant to degradation by high-temperature lamination processes. The curing process takes place after IV test and prior to the lamination of an encapsulant film. The curing step is carried out in conjunction with a light soaking step that takes place prior to the IV test. The curing process takes place for a time that may range from 10 minutes to two days and at a high relative humidity, RH. Relative humidities of 20-90% are used and have been effective in passivating selenium vacancy defects associated with the absorber layers. The cured absorber layers are resistant to degradation and produce a solar cell with a high solar cell efficiency.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 18, 2015
    Assignee: TSMC Solar Ltd.
    Inventors: Yi-Feng Huang, Chia-Juei Pan, Kwang-Ming Lin
  • Publication number: 20150137327
    Abstract: The invention provides a semiconductor device. A buried layer is formed in a substrate. A first deep trench contact structure is formed in the substrate. The first deep trench contact structure comprises a conductor and a liner layer formed on a sidewall of the conductor. A bottom surface of the first deep trench contact structure is in contact with the buried layer.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 21, 2015
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Geeng-Lih LIN, Kwang-Ming LIN, Shang-Hui TU, Jui-Chun CHANG
  • Publication number: 20150017757
    Abstract: A method for forming thin film solar cell materials introducing a first inert gas mixture that includes hydrogen selenide into a chamber at a first pressure value until the chamber reaches a second pressure value and at a first temperature value, wherein the second pressure value is a predefined percentage of the first pressure value. The temperature in the chamber is increased to a second temperature value for a selenization process so that the pressure in the chamber increases to a third pressure value. Residual gas that is generated during the selenization process can be removed from the chamber. A second inert gas mixture that includes hydrogen sulfide is added into the chamber until the chamber reaches a fourth pressure value. The temperature in the chamber is increased to a third temperature value for a sulfurization process. The chamber is cooled after the sulfurization process.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 15, 2015
    Inventors: Kwang-Ming LIN, Chi-Wei LIU, Wen-Cheng KUO
  • Patent number: 8921202
    Abstract: The invention provides a semiconductor device. A buried layer is formed in a substrate. A first deep trench contact structure is formed in the substrate. The first deep trench contact structure comprises a conductor and a liner layer formed on a sidewall of the conductor. A bottom surface of the first deep trench contact structure is in contact with the buried layer.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: December 30, 2014
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Geeng-Lih Lin, Kwang-Ming Lin, Shang-Hui Tu, Jui-Chun Chang
  • Publication number: 20140273305
    Abstract: A method for encapsulating solar cells includes a curing step that renders CIGS or other types of solar cell absorber layers resistant to degradation by high-temperature lamination processes. The curing process takes place after IV test and prior to the lamination of an encapsulant film. The curing step is carried out in conjunction with a light soaking step that takes place prior to the IV test. The curing process takes place for a time that may range from 10 minutes to two days and at a high relative humidity, RH. Relative humidities of 20-90% are used and have been effective in passivating selenium vacancy defects associated with the absorber layers. The cured absorber layers are resistant to degradation and produce a solar cell with a high solar cell efficiency.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventors: Yi-Feng HUANG, Chia-Juei PAN, Kwang-Ming LIN
  • Publication number: 20140273329
    Abstract: A multi-step scribing operation is provided for forming scribe lines in solar panels to form multiple interconnected cells on a solar panel substrate. The multi-step scribing operation includes at least one step utilizing a nanosecond laser cutting operation. The nanosecond laser cutting operation is followed by a mechanical cutting operation or a subsequent nanosecond laser cutting operation. In some embodiments, the multi-step scribing operation produces a two-tiered scribe line profile and the method prevents local shunting and minimizes active area loss on the solar panel.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: TSMC SOLAR LTD.
    Inventors: Hsuan-Sheng YANG, Kwang-Ming LIN, Yi-Feng HUANG, Li-Wei CHANG, Chia-Hung TSAI
  • Publication number: 20120175727
    Abstract: The invention provides a semiconductor device. A buried layer is formed in a substrate. A first deep trench contact structure is formed in the substrate. The first deep trench contact structure comprises a conductor and a liner layer formed on a sidewall of the conductor. A bottom surface of the first deep trench contact structure is in contact with the buried layer.
    Type: Application
    Filed: January 7, 2011
    Publication date: July 12, 2012
    Inventors: Geeng-Lih Lin, Kwang-Ming Lin, Shang-Hui Tu, Jui-Chun Chang
  • Publication number: 20110101453
    Abstract: The invention provides a lateral double-diffused metal oxide semiconductor (LDMOS). The pre-metal dielectric layer (PMD) of the LDMOS is a silicon rich content material. Additionally, the inter-layer dielectric layer (ILD), inter-metal dielectric layer (IMD), or protective layer of the LDMOS may be formed of a silicon rich content material.
    Type: Application
    Filed: October 30, 2009
    Publication date: May 5, 2011
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Kwang-Ming Lin, Ming-Cheng Lin, Yu-Long Chang
  • Publication number: 20100270615
    Abstract: A lateral diffused metal oxide semiconductor transistor is disclosed. A p-type bulk is disposed on a substrate. An n-type well region is disposed in the p-type bulk. A plurality of field oxide layers are disposed on the p-type bulk and the n-type well region. A gate structure is disposed on a portion of the p-type bulk and one of the plurality of field oxide layers. At least one deep trench isolation structure is disposed in the p-type bulk and adjacent to the n-type well region.
    Type: Application
    Filed: April 28, 2009
    Publication date: October 28, 2010
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Kwang-Ming Lin, Shih-Chieh Pu, Shih-Chan Chen
  • Patent number: 7821082
    Abstract: A lateral diffused metal oxide semiconductor transistor is disclosed. A p-type bulk is disposed on a substrate. An n-type well region is disposed in the p-type bulk. A plurality of field oxide layers are disposed on the p-type bulk and the n-type well region. A gate structure is disposed on a portion of the p-type bulk and one of the plurality of field oxide layers. At least one deep trench isolation structure is disposed in the p-type bulk and adjacent to the n-type well region.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: October 26, 2010
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Kwang-Ming Lin, Shih-Chieh Pu, Shih-Chan Chen