Patents by Inventor Kwok Fu Chiu

Kwok Fu Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8416547
    Abstract: Described herein is technology for, among other things, short-circuit protection. The technology involves sensing a current that is based on an output current and generating a current sense signal in response. The technology further involves buffering the current sense signal. The technology further involves limiting the output current when it exceeds a threshold value.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: April 9, 2013
    Assignee: National Semiconductor Corporation
    Inventor: Kwok-Fu Chiu
  • Patent number: 8339197
    Abstract: Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: December 25, 2012
    Assignee: National Semiconductor Corporation
    Inventors: Kwok-Fu Chiu, Yih-Chyi Chong, Michael E. Haslam
  • Publication number: 20120139634
    Abstract: Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 7, 2012
    Inventors: Kwok-Fu Chiu, Yih-Chyi Chong, Michael E. Haslam
  • Patent number: 7859233
    Abstract: A synchronous switching voltage regulator circuit is provided. After the first PWM pulse or at the end of a soft-start, a gradual transition is made from asynchronous rectification to fully synchronous rectification. The gradual transition to synchronous rectification is made by gradually increasing the time that the synchronous switch is enabled to be on.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: December 28, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Faruk Jose Nome Silva, Kwok-Fu Chiu, Barry James Culpepper, Michael J. Wurtz
  • Patent number: 7791401
    Abstract: An offset voltage temperature coefficient reduction system for a differential operational amplifier is disclosed. In one embodiment, the offset voltage temperature coefficient reduction system comprises a first current source generating a first current with a positive temperature coefficient and a second current source generating a second current with a negative temperature coefficient, where the first current source and the second current source are coupled to their respective output nodes of the differential op amp such that an error due to an input offset voltage of the differential operational amplifier is approximately constant over a range of temperature, and where a difference between the first current and the second current is approximately zero at a reference temperature. In similar manner, the offset voltage temperature coefficient can be also adjusted to desired value other than zero.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: September 7, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Kwok-Fu Chiu
  • Patent number: 7564309
    Abstract: Described herein is technology for, among other things, input bias current cancellation. The technology includes a bipolar differential pair coupled with a supply voltage (VCC). The bipolar differential pair includes a first transistor and a second transistor. The technology further includes an input bias current cancellation circuit coupled with the bipolar differential pair and including a third transistor. The third transistor has a collector-emitter voltage VCE, and the bipolar differential pair is operable to receive an input voltage greater than VCC?2VCE without causing the third transistor to operate in the saturation region.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: July 21, 2009
    Assignee: National Semiconductor Corportaion
    Inventor: Kwok-Fu Chiu
  • Publication number: 20080123235
    Abstract: Described herein is technology for, among other things, short-circuit protection. The technology involves sensing a current that is based on an output current and generating a current sense signal in response. The technology further involves buffering the current sense signal. The technology further involves limiting the output current when it exceeds a threshold value.
    Type: Application
    Filed: November 29, 2006
    Publication date: May 29, 2008
    Inventor: Kwok-Fu Chiu
  • Publication number: 20080068085
    Abstract: Described herein is technology for, among other things, input bias current cancellation. The technology includes a bipolar differential pair coupled with a supply voltage (VCC). The bipolar differential pair includes a first transistor and a second transistor. The technology further includes an input bias current cancellation circuit coupled with the bipolar differential pair and including a third transistor. The third transistor has a collector-emitter voltage VCE, and the bipolar differential pair is operable to receive an input voltage greater than VCC?2VCE without causing the third transistor to operate in the saturation region.
    Type: Application
    Filed: December 6, 2006
    Publication date: March 20, 2008
    Inventor: Kwok-Fu CHIU
  • Patent number: 7196589
    Abstract: An integrated circuit includes an oscillator circuit, where a frequency of an oscillator output signal provided by the oscillator circuit is adjustable by either coupling a resistor to an input pin, or by applying an external clock signal to the input pin. The oscillator circuit includes a comparator, a follower, a current-controlled oscillator, and a switch circuit. The switch circuit is coupled between the input pin and a node that is coupled to the current-controlled oscillator. Also, the follower is arranged to cause the voltage at the node to be at a pre-defined voltage unless the voltage at the node is overdriven by an external clock signal. The comparator circuit is arranged to determine whether the signal at the input pin is a clock signal. If it is determined that the signal at the input pin is a clock signal, the switch circuit is opened.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: March 27, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Faruk Jose Nome Silva, Kwok-Fu Chiu
  • Patent number: 7109688
    Abstract: A controller for a synchronous switching regulator is arranged to control a switch with a control signal, and to control a synchronous switch with a synchronous switch control signal. The controller disables the synchronous switch control signal at power-up so that the regulator operates with asynchronous rectification. Also, the controller is arranged to detect whether the regulator is in discontinuous or continuous conduction mode by determining whether a switch node voltage at the switch node a switch node stays negative. The regulator keeps operating with asynchronous rectification until the switch node voltage stays negative for the entire off period of the switch, which indicates the regulator is operating in continuous conduction mode. At this point, the controller enables assertion of the synchronous switch control signal, so that the regulator operates with synchronous rectification. The controller is arranged to enable the output voltage to rise monotonically when driving a prebiased load.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: September 19, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Kwok-Fu Chiu, Barry James Culpepper
  • Patent number: 7045992
    Abstract: A synchronous switching voltage regulator circuit is provided. After the first PWM pulse or at the end of a soft-start, a gradual transition is made from asynchronous rectification to fully synchronous rectification. The gradual transition to synchronous rectification is made by gradually increasing the time that the synchronous switch is enabled to be on.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: May 16, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Faruk Jose Nome Silva, Kwok-Fu Chiu, Barry Culpepper, Michael J. Wurtz
  • Patent number: 6496052
    Abstract: A method and apparatus is directed to generating an improved temperature coefficient for the current limit in a switching regulator/driver circuit. The current limit sense circuit includes a comparator that compares two signals to determine when the current limit has been exceeded. One signal is produced from a temperature independent voltage source, a trans-conductance cell, and a sensor resistor circuit. Another signal is produced by an active output circuit, such that the signal corresponds to the current associated with the switching regulator/driver circuit. The current sensed by the regulator/driver is temperature dependent due to the resistances in the active output circuit, the sensor resistor circuit, and the trans-conductance cell. Each of these resistances has a temperature coefficient. The temperature coefficients determine the amount of temperature dependence in the sensed switching/regulator current.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: December 17, 2002
    Assignee: National Semiconductor Corporation
    Inventor: Kwok-Fu Chiu
  • Patent number: 6218884
    Abstract: An apparatus including a low voltage differential signaling (LVDS) driver circuit with on-resistance cancellation, includes a current steering circuit having an on-resistance. In order to cancel the on-resistance of the current steering circuit, the LVDS driver circuit also includes a current proportional to absolute temperature current source, a transistor having an on-resistance proportional to the on-resistance of the current steering circuit, and a voltage-to-current conversion circuit coupled to the transistor, wherein the voltage-to-current conversion circuit converts the drain-to-source voltage of the transistor into a current proportional to an output current of the LVDS driver circuit. A first resistive circuit receives the current proportional to absolute temperature and the current proportional to an output current of the LVDS driver circuit and in accordance therewith provides a first reference signal.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: April 17, 2001
    Assignee: National Semiconductor Corp.
    Inventor: Kwok Fu Chiu
  • Patent number: 6137361
    Abstract: A low power class A amplifier circuit for driving the output load terminal with current source and sink circuits. Based upon an internally generated control signal, the output sinking current conducted by the current sink circuit remains constant regardless of input signal level and output load resistance, while the output sourcing current provided by the current source circuit varies in relation to the input signal and output load resistance. Hence, the output source current increases and decreases as the input signal increases and decreases and as the output load resistance decreases and increases, respectively. This results in reduced output "standby" current, thereby reducing the "standby" power dissipation of the circuit during no, or low, output load conditions.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: October 24, 2000
    Assignee: National Semiconductor Corporation
    Inventor: Kwok Fu Chiu
  • Patent number: 5892388
    Abstract: A circuit is provided which generates a reference bias current using a difference in base-emitter voltages of two bipolar transistors imposed across a source terminal and a drain terminal of an MOS transistor. The circuit includes a circuit for compensating shifts in threshold voltage, and thus shifts in the current flowing therein, of the MOS transistor. In one embodiment, the bias circuit is configured to achieve superior efficiency in generating small bias currents. In another embodiment, the bias circuit is configured to operate using minimal voltage supplies. In all embodiments, the reference bias current generated thereby has a positive temperature coefficient and is substantially independent of process variations.
    Type: Grant
    Filed: April 15, 1996
    Date of Patent: April 6, 1999
    Assignee: National Semiconductor Corporation
    Inventor: Kwok-Fu Chiu
  • Patent number: 5644264
    Abstract: An output stage of a CMOS comparator is designed to have a limited short circuit current, while maintaining maximum output voltage swing and a low quiescent current. The output stage includes a reference voltage generation circuit, which generates a gate voltage at the output transistor of limited range, so that the short circuit current of the output transistor is limited. In one embodiment, the reference voltage is generated by a plurality of serially connected diodes.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: July 1, 1997
    Assignee: National Semiconductor Corporation
    Inventors: Kwok-Fu Chiu, Don Roy Sauer
  • Patent number: 5525934
    Abstract: An output stage of a CMOS comparator is designed to have a limited short circuit current, while maintaining maximum output voltage swing and a low quiescent current. The output stage includes a reference voltage generation circuit, which generates a gate voltage at the output transistor of limited range, so that the short circuit current of the output transistor is limited. In one embodiment, the reference voltage is generated by a plurality of serially connected diodes.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: June 11, 1996
    Assignee: National Semiconductor Corporation
    Inventors: Kwok-Fu Chiu, Don R. Sauer
  • Patent number: 5471172
    Abstract: An AB Cascode amplifier provides low quiescent current operation, while maintaining the high gain and wide bandwidth of prior art folded cascode amplifier. Instead of fixed current sources, the AB cascode amplifier uses variable current sources, which are biased by a fixed small current source and two variable biased transistor.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: November 28, 1995
    Assignee: National Semiconductor Corporation
    Inventors: Kwok-Fu Chiu, Don R. Sauer
  • Patent number: 5471175
    Abstract: An improved input protection circuit receiving a differential signal has a small signal input circuit and a large signal input circuit. The small signal input circuit is active when the differential input signal has a magnitude not exceeding a predetermined value. The large signal input circuit is active when the differential input signal has a magnitude exceeding the predetermined value. Because the small signal input circuit does not see a large differential signal across the gate terminals of its input transistors, offset voltage ("V.sub.os ") drift is avoided resulting in enhanced circuit reliability. A switch circuit isolates the small signal input circuit when the large signal input circuit is active.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: November 28, 1995
    Assignee: National Semiconductor Corporation
    Inventors: Kwok-Fu Chiu, Don R. Sauer