Abstract: A charge pumping method includes: generating a first boosted voltage by boosting an input voltage by a boosting mode of a first multiplier; changing the level of a voltage charged in at least one capacitor provided in the inside of a charge pump circuit, in preparation for a change in the boosting mode; and generating a second boosted voltage by boosting the input voltage by a boosting mode of a second multiplier.

Abstract: A charge pumping method includes: generating a first boosted voltage by boosting an input voltage by a boosting mode of a first multiplier; changing the level of a voltage charged in at least one capacitor provided in the inside of a charge pump circuit, in preparation for a change in the boosting mode; and generating a second boosted voltage by boosting the input voltage by a boosting mode of a second multiplier.

Abstract: A source driver, a controller, and a method for driving a source drive are provided. The source driver includes a controller configured to receive a start pulse signal, and generate and output one of a new start pulse signal if the start pulse signal is received, and an internal start pulse signal if the start pulse signal is not received, a shift register configured to receive video data, store the video data, and output the video data if the outputted start pulse signal is received by the shift register, a digital-to-analog converter (DAC) configured to convert the video data output from the shift register into an analog voltage signal, and output the analog voltage signal, and an output buffer configured to buffer the analog voltage signal output from the DAC, and output the buffered analog voltage signal.

Abstract: A charge pumping method includes: generating a first boosted voltage by boosting an input voltage by a boosting mode of a first multiplier; changing the level of a voltage charged in at least one capacitor provided in the inside of a charge pump circuit, in preparation for a change in the boosting mode; and generating a second boosted voltage by boosting the input voltage by a boosting mode of a second multiplier.

Abstract: Waveform generation circuits are provided. A waveform generation circuit includes a waveform generation block configured to generate a waveform signal corresponding to a driving control signal, and a control signal generation block configured to generate the driving control signal to compensate the waveform signal for an environmental factor affecting the waveform generation circuit.

Abstract: A method and apparatus for controlling writing of data to a graphic memory is provided. In the method and apparatus, a plurality of consecutively input data pieces are controlled to be not consecutively written to the same memory area in terms of time or space.

Abstract: A sawtooth wave generating circuit that outputs a sawtooth wave signal after calibration and a switch mode power supply device including the sawtooth wave generating circuit is disclosed. The sawtooth wave generating circuit includes a capacitor, a calibration circuit, a charging circuit, discharging circuit and a control unit. The calibration circuit feedbacks a sawtooth wave signal, generates a plurality of voltage signals based on the sawtooth wave signal, and selects one of the voltage signals to generate a calibration output signal. Therefore, the sawtooth wave generating circuit generates a stable sawtooth wave signal regardless of operating conditions.

Abstract: A method and apparatus for controlling writing of data to a graphic memory is provided. In the method and apparatus, a plurality of consecutively input data pieces are controlled to be not consecutively written to the same memory area in terms of time or space.

Abstract: Provided is an output buffer for a source driver circuit which receives an external buffer input signal and generates a buffer output signal having a predetermined target voltage, the output buffer including: an over-driving controller configured to generate a pair of first internal buffer input signals and a pair of second internal buffer input signals for an over-driving operation, based on a first over-driver enable signal and a second over-driver enable signal, the first and second over-driver signals being provided from an external source, and an output buffer unit configured to: perform the over-driving operation, based on the pair of first internal buffer input signals and the pair of second internal buffer input signals provided from the over-driving controller, and generate: a buffer output signal including a target voltage greater than the predetermined target voltage, or a buffer output signal including a target voltage less than the predetermined target voltage.

Abstract: An automatic data recovery circuit includes a register, an error detection unit and a data recovery unit. The register stores a register data including an input data and a remainder data generated by a cyclic redundancy check calculation on the input data using a predefined generation polynomial. The error detection unit performs a modular calculation on the register data stored in the register using the predefined generation polynomial to generate an error detection signal indicating whether an error is detected in the register data stored in the register. The data recovery unit recovers the input data when an error is detected in the input data based on the error detection signal and a comparison data generated by comparing the input data stored in the register with a reference voltage using a capacitor.

Abstract: A source driver and a common voltage driver for a display device using a time division driving method, in which the source driver outputs an analog voltage corresponding to digital image data to a corresponding source line out of a plurality of source lines, after precharging the corresponding source line with a predetermined voltage. The common voltage driver discretely and sequentially increases or decreases the common voltage. By using the source driver and the common voltage driver, the power consumed upon driving of the display device can be reduced.

Abstract: A method and apparatus for controlling writing of data to a graphic memory is provided. In the method and apparatus, a plurality of consecutively input data pieces are controlled to be not consecutively written to the same memory area in terms of time or space.

Abstract: Disclosed is an operational amplifier including an overdriving circuit capable of reaching a target voltage within an operation time by outputting a higher voltage than the target voltage when an RC delay time is greater. The operational amplifier may including an overdriving circuit, in which first and second input terminals and an output terminal may be provided, an input voltage may be applied to the first input terminal, a second input terminal may be connected to the output terminal, and the input voltage applied to the first input terminal may be overdriven to have a certain level to be outputted to the output terminal, may include: first and second overdriving units performing an overdriving operation at a rising edge and a falling edge, respectively.

Abstract: A method and apparatus for controlling writing of data to a graphic memory is provided. In the method and apparatus, a plurality of consecutively input data pieces are controlled to be not consecutively written to the same memory area in terms of time or space.

Abstract: A boosted voltage generation circuit may include: a boosting circuit configured to boost an input voltage based on a boosting rate and output a boosted voltage, a boosting rate setting unit configured to receive a feedback on a level of the input voltage and set a boosting rate, and an input voltage level setting unit configured to set the level of the input voltage in response to a target level of the boosted voltage and the boosting rate.

Abstract: In one aspect, an apparatus for driving display data includes an address mapping unit which generates second address units by dividing gradation data displayed on a plurality of pixels in a display panel into a plurality of first address units that are in the form of an a×b matrix, and mapping addresses of the gradation data in each of the first address units into the form of a b×a matrix, wherein the plurality of the first and second address units are arranged in the form of an M×N matrix, wherein a, b, M and N are natural numbers, and a is greater than b. The apparatus further includes a memory unit which stores the second address units having the mapped addresses in the form of a b×a matrix as units in the form of an M×N matrix, a data output unit which receives the data in a×N columns output from the memory unit and outputs the data as data in b×N columns, and a source driver block which receives the data in the b×N columns and transmitting the data to the display panel.

Abstract: Waveform generation circuits are provided. A waveform generation circuit includes a waveform generation block configured to generate a waveform signal corresponding to a driving control signal, and a control signal generation block configured to generate the driving control signal to compensate the waveform signal for an environmental factor affecting the waveform generation circuit.

Abstract: A source driver, a controller, and a method for driving a source drive are provided. The source driver includes a controller configured to receive a start pulse signal, and generate and output one of a new start pulse signal if the start pulse signal is received, and an internal start pulse signal if the start pulse signal is not received, a shift register configured to receive video data, store the video data, and output the video data if the outputted start pulse signal is received by the shift register, a digital-to-analog converter (DAC) configured to convert the video data output from the shift register into an analog voltage signal, and output the analog voltage signal, and an output buffer configured to buffer the analog voltage signal output from the DAC, and output the buffered analog voltage signal.

Abstract: A waveform generation circuit includes: a waveform generation block configured to generate a waveform signal corresponding to a driving control signal; and a control signal generation block configured to generate a driving control signal for compensating the waveform signal for an environmental factor reflected into the waveform generation circuit.

Abstract: Provided is an output buffer, which may be included in a source driver of a liquid crystal display (LCD) device. The output buffer may include a differential amplification unit and an output unit. The differential amplification unit may generate control currents by amplifying the difference between the voltages of an analog image signal and a signal output from the output buffer. The output unit outputs the amplified analog image signal in response to the control currents. The amount of bias current used to drive the differential amplification unit increases during a charge recycling period, and the amount of quiescent current flowing through the output unit decreases during the charge recycling period. The amount of the bias current used to drive the differential amplification unit decreases during a driving period, and the amount of the quiescent current flowing through the output unit increases during the driving period.