Patents by Inventor Kyung-Wook Kwon

Kyung-Wook Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11932618
    Abstract: Disclosed are novel compounds of Chemical Formula 1, optical isomers of the compounds, and pharmaceutically acceptable salts of the compounds or the optical isomers. The compounds, isomers, and salts exhibit excellent activity as GLP-1 receptor agonists. In particular, they, as GLP-1 receptor agonists, exhibit excellent glucose tolerance, thus having a great potential to be used as therapeutic agents for metabolic diseases. Moreover, they exhibit excellent pharmacological safety for cardiovascular systems.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: March 19, 2024
    Assignee: ILDONG PHARMACEUTICAL CO., LTD.
    Inventors: Hong Chul Yoon, Kyung Mi An, Myong Jae Lee, Jin Hee Lee, Jeong-geun Kim, A-rang Im, Woo Jin Jeon, Jin Ah Jeong, Jaeho Heo, Changhee Hong, Kyeojin Kim, Jung-Eun Park, Te-ik Sohn, Changmok Oh, Da Hae Hong, Sung Wook Kwon, Jung Ho Kim, Jae Eui Shin, Yeongran Yoo, Min Whan Chang, Eun Hye Jang, In-gyu Je, Ji Hye Choi, Gunhee Kim, Yearin Jun
  • Patent number: 11912674
    Abstract: The present invention provides methods for treating or ameliorating metabolic diseases, cholestatic liver diseases, or organ fibrosis, which comprises administering to a subject a therapeutically effective amount of a pharmaceutical composition comprising an isoxazole derivative, a racemate, an enantiomer, or a diastereoisomer thereof, or a pharmaceutically acceptable salt of the derivative, the racemate, the enantiomer, or the diastereoisomer.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 27, 2024
    Assignee: IL DONG PHARMACEUTICAL CO., LTD.
    Inventors: Jae-Hoon Kang, Hong-Sub Lee, Yoon-Suk Lee, Jin-Ah Jeong, Sung-Wook Kwon, Jeong-Guen Kim, Kyung-Sun Kim, Dong-Keun Song, Sun-Young Park, Kyeo-Jin Kim, Ji-Hye Choi, Hey-Min Hwang
  • Patent number: 11705482
    Abstract: A metal-insulator-metal (MIM) capacitor includes a first group of metal contacts disposed on a first region of an isolation layer spaced apart from each other in a first direction, a second group of metal contacts disposed on a second region of the isolation layer spaced apart from each other in the first direction, a dielectric layer disposed between the first group of metal contacts and the second group of metal contacts, a first metal electrode disposed to contact the top surfaces of the first group of metal contacts, and a second metal electrode disposed to contact the top surfaces of the second group of metal contacts.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: July 18, 2023
    Assignee: SK Hynix system ic Inc.
    Inventors: Kyung Wook Kwon, Mun Young Lee, Myoung Kyun Choi
  • Publication number: 20230129912
    Abstract: A metal-insulator-metal (MIM) capacitor includes a first group of metal contacts disposed on a first region of an isolation layer spaced apart from each other in a first direction, a second group of metal contacts disposed on a second region of the isolation layer spaced apart from each other in the first direction, a dielectric layer disposed between the first group of metal contacts and the second group of metal contacts, a first metal electrode disposed to contact the top surfaces of the first group of metal contacts, and a second metal electrode disposed to contact the top surfaces of the second group of metal contacts.
    Type: Application
    Filed: December 23, 2022
    Publication date: April 27, 2023
    Inventors: Kyung Wook KWON, Mun Young LEE, Myoung Kyun CHOI
  • Patent number: 11569343
    Abstract: A metal-insulator-metal (MIM) capacitor includes a first group of metal contacts disposed on a first region of an isolation layer spaced apart from each other in a first direction, a second group of metal contacts disposed on a second region of the isolation layer spaced apart from each other in the first direction, a dielectric layer disposed between the first group of metal contacts and the second group of metal contacts, a first metal electrode disposed to contact the top surfaces of the first group of metal contacts, and a second metal electrode disposed to contact the top surfaces of the second group of metal contacts.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: January 31, 2023
    Assignee: SK HYNIX SYSTEM IC INC.
    Inventors: Kyung Wook Kwon, Mun Young Lee, Myoung Kyun Choi
  • Publication number: 20210384293
    Abstract: A metal-insulator-metal (MIM) capacitor includes a first group of metal contacts disposed on a first region of an isolation layer spaced apart from each other in a first direction, a second group of metal contacts disposed on a second region of the isolation layer spaced apart from each other in the first direction, a dielectric layer disposed between the first group of metal contacts and the second group of metal contacts, a first metal electrode disposed to contact the top surfaces of the first group of metal contacts, and a second metal electrode disposed to contact the top surfaces of the second group of metal contacts.
    Type: Application
    Filed: January 6, 2021
    Publication date: December 9, 2021
    Inventors: Kyung Wook KWON, Mun Young LEE, Myoung Kyun CHOI
  • Patent number: 8853026
    Abstract: Semiconductor devices and methods of fabricating the same are provided. An insulating film can be disposed on a semiconductor substrate, and insulating film patterns can be formed opening a plurality of areas with predetermined widths by patterning the insulating film. A plurality of ion implantation areas having a first conductivity type can be formed by implanting impurities into the plurality of open areas, and an oxide film pattern can be formed on each of the ion implantation areas. The insulating film patterns can be removed, and ion implantation areas having a second conductivity type can be formed by implanting impurities using the oxide film pattern as a mask. The semiconductor substrate can be annealed at a high temperature to form deep wells.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: October 7, 2014
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Kyung Wook Kwon
  • Publication number: 20140246762
    Abstract: Semiconductor devices and methods of fabricating the same are provided. An insulating film can be disposed on a semiconductor substrate, and insulating film patterns can be formed opening a plurality of areas with predetermined widths by patterning the insulating film. A plurality of ion implantation areas having a first conductivity type can be formed by implanting impurities into the plurality of open areas, and an oxide film pattern can be formed on each of the ion implantation areas. The insulating film patterns can be removed, and ion implantation areas having a second conductivity type can be formed by implanting impurities using the oxide film pattern as a mask. The semiconductor substrate can be annealed at a high temperature to form deep wells.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 4, 2014
    Applicant: DONGBU HITEK CO., LTD.
    Inventor: Kyung Wook KWON
  • Patent number: 8198659
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device. A method of manufacturing a semiconductor device may include forming a gate electrode over a semiconductor substrate, a second conductive type ion implantation region at opposite sides of a gate electrode, a second conductive type ion implantation region as a first conductive type second ion implantation region by implanting a first conductive type impurity over opposite sides of said gate electrode, and/or forming a first conductive type first ion implantation region that substantially surrounds a first conductive type second ion implantation region. A method of manufacturing a semiconductor device may form an N type MOSFET and/or a P type MOSFET using a single photolithography process for each N+ source/drain photolithography process and/or P+ source/drain photolithography process.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: June 12, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Kyung-Wook Kwon
  • Publication number: 20100127311
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device. A method of manufacturing a semiconductor device may include forming a gate electrode over a semiconductor substrate, a second conductive type ion implantation region at opposite sides of a gate electrode, a second conductive type ion implantation region as a first conductive type second ion implantation region by implanting a first conductive type impurity over opposite sides of said gate electrode, and/or forming a first conductive type first ion implantation region that substantially surrounds a first conductive type second ion implantation region. A method of manufacturing a semiconductor device may form an N type MOSFET and/or a P type MOSFET using a single photolithography process for each N+ source/drain photolithography process and/or P+ source/drain photolithography process.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 27, 2010
    Inventor: Kyung-Wook Kwon