Patents by Inventor Lajos Gazsi

Lajos Gazsi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9748936
    Abstract: Embodiments relate to a frequency generator. The frequency generator comprises a quantization device configured to synthesize a carrier signal with a desired frequency characterized by a series of phase transitions at desired time instants, by approximating a phase transition at a desired time instant with a phase transition at a quantized effective time instant. The frequency generator further comprises a noise shaper configured to provide a noise-shaped feedback signal using the desired time instant and the effective time instant. Moreover, the frequency generator comprises an error generator configured to cause an error component within the effective time instant, the error component being at least 50 percent of a temporal quantization unit.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: August 29, 2017
    Assignee: Intel IP Corporation
    Inventors: Stefan Meier, Lajos Gazsi, Matthias Schoebinger
  • Publication number: 20160182026
    Abstract: Embodiments relate to a frequency generator. The frequency generator comprises a quantization device configured to synthesize a carrier signal with a desired frequency characterized by a series of phase transitions at desired time instants, by approximating a phase transition at a desired time instant with a phase transition at a quantized effective time instant. The frequency generator further comprises a noise shaper configured to provide a noise-shaped feedback signal using the desired time instant and the effective time instant. Moreover, the frequency generator comprises an error generator configured to cause an error component within the effective time instant, the error component being at least 50 percent of a temporal quantization unit.
    Type: Application
    Filed: September 22, 2015
    Publication date: June 23, 2016
    Inventors: Stefan Meier, Lajos Gazsi, Matthias Schoebinger
  • Patent number: 9360503
    Abstract: A method for determining a sampling time of a signal, the method including: determining a candidate sampling time of a signal for input to a sampling circuit; determining a resultant sampling time at which the sampling circuit samples the signal when input with the candidate sampling time; and determining a sampling time of the signal based on a noise shaping of a difference between the resultant sampling time and the candidate sampling time.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: June 7, 2016
    Assignee: INTEL DEUTSCHLAND GMBH
    Inventors: Lajos Gazsi, Stefan Meier, Matthias Schoebinger
  • Patent number: 9325551
    Abstract: This application discusses, among other things, apparatus and methods for suppressing irrelevant edges of a phase modulated signal. In an example, a method can include receiving phase modulation information at a suppression circuit of a communication device, computing distances between transitions of a phase modulation signal, the phase modulation signal associated with the phase modulation information, comparing the distances to a threshold distance at a comparator of the suppression circuit, and suppressing a first transition of the phase modulation signal associated with the phase modulation information if a first distance is less than the threshold distance.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: April 26, 2016
    Assignee: Intel Corporation
    Inventors: Stefan Meier, Matthias Schoebinger, Lajos Gazsi
  • Publication number: 20150172083
    Abstract: This application discusses, among other things, apparatus and methods for suppressing irrelevant edges of a phase modulated signal. In an example, a method can include receiving phase modulation information at a suppression circuit of a communication device, computing distances between transitions of a phase modulation signal, the phase modulation signal associated with the phase modulation information, comparing the distances to a threshold distance at a comparator of the suppression circuit, and suppressing a first transition of the phase modulation signal associated with the phase modulation information if a first distance is less than the threshold distance.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Inventors: Stefan Meier, Matthias Schoebinger, Lajos Gazsi
  • Publication number: 20150042310
    Abstract: A method for determining a sampling time of a signal, the method including: determining a candidate sampling time of a signal for input to a sampling circuit; determining a resultant sampling time at which the sampling circuit samples the signal when input with the candidate sampling time; and determining a sampling time of the signal based on a noise shaping of a difference between the resultant sampling time and the candidate sampling time.
    Type: Application
    Filed: August 8, 2013
    Publication date: February 12, 2015
    Inventors: Lajos Gazsi, Stefan Meier, Matthias Schoebinger
  • Patent number: 8830104
    Abstract: Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: September 9, 2014
    Assignee: Infineon Technologies AG
    Inventors: Stephan Henzler, Matthias Schoebinger, Lajos Gazsi
  • Patent number: 8111180
    Abstract: This disclosure relates to analog to digital conversion using irregular sampling.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: February 7, 2012
    Assignee: Infineon Technologies AG
    Inventors: Andreas Wiesbauer, Lajos Gazsi
  • Publication number: 20110279296
    Abstract: Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
    Type: Application
    Filed: July 21, 2011
    Publication date: November 17, 2011
    Inventors: Stephan Henzler, Matthias Schobinger, Lajos Gazsi
  • Patent number: 8018366
    Abstract: Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: September 13, 2011
    Assignee: Infineon Technologies AG
    Inventors: Stephan Henzler, Matthias Schobinger, Lajos Gazsi
  • Publication number: 20110109489
    Abstract: Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
    Type: Application
    Filed: November 10, 2009
    Publication date: May 12, 2011
    Applicant: Infineon Technologies AG
    Inventors: Stephan Henzler, Matthias Schobinger, Lajos Gazsi
  • Publication number: 20100201558
    Abstract: This disclosure relates to analog to digital conversion using irregular sampling.
    Type: Application
    Filed: April 16, 2010
    Publication date: August 12, 2010
    Applicant: Infineon Technologies AG
    Inventors: Andreas Wiesbauer, Lajos Gazsi
  • Patent number: 7746256
    Abstract: This disclosure relates to analog to digital conversion using irregular sampling.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: June 29, 2010
    Assignee: Infineon Technologies AG
    Inventors: Andreas Wiesbauer, Lajos Gazsi
  • Patent number: 7573955
    Abstract: A digital phase locked loop has a digitally controlled oscillator for generating an output frequency, a phase detector device for detecting the phase difference between a reference frequency and an output frequency of the oscillator. The phase detector device contains a delta-sigma frequency decision maker, and a digital loop filter, connected downstream of the phase detector device, for actuating the digitally controlled oscillator.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: August 11, 2009
    Assignee: Infineon Technologies AG
    Inventor: Lajos Gazsi
  • Patent number: 7526636
    Abstract: The present invention relates to a parallel multithread processor (1) with split contexts, with M parallel-connected standard processor root units (2) being provided for instruction execution of program instructions for different threads (T), and with N context memories (3) being provided, which each temporarily store a current state of a thread (T), and with a thread monitoring unit (4) being provided, by means of which each standard processor root unit (2) can be connected to each context memory (3). The invention accordingly provides a processor architecture in which a number N of different context memories (3) and corresponding threads (T) are effectively fully networked with a number M of standard processor root units (2). This means that use is made not only of paralleling of the standard processor root units (2), but also of the threads (T) and of the context memories (3).
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: April 28, 2009
    Assignee: Infineon Technologies AG
    Inventors: Lajos Gazsi, Jinan Lin, Soenke Mehrgardt, Xiaoning Nie
  • Publication number: 20090091486
    Abstract: This disclosure relates to analog to digital conversion using irregular sampling.
    Type: Application
    Filed: October 3, 2008
    Publication date: April 9, 2009
    Applicant: Infineon Technologies AG
    Inventors: Andreas Wiesbauer, Lajos Gazsi
  • Patent number: 7474876
    Abstract: A device for the production of standard compliant signals, for example pulse-type signals in a telecommunication network, serves the production and adaptation and/or pre-distortion of signals with a certain signal form, which is defined dependent on a standard signal form specified in a standard. The device comprises signal generation means (10) for the production of the signals with a certain signal form and signal adjustment means (20) for the adaptation or pre-distortion of the signals. The signal generation means (10) according to the invention are digitally realized, by using a programmable shift register (14), which contains multipliers specified by the standard signal form for multiplication with a digital input signal (1). The signal adjustment means (20) comprise substantially scalable digital filter arrangements in the form of a serial connection of digital filters (22) with a downstream multiplexer (24).
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: January 6, 2009
    Assignee: Infineon Technologies AG
    Inventors: Jörg Bonhaus, Thomas Duda, Lajos Gazsi, Peter Gregorius
  • Patent number: 7339987
    Abstract: The invention relates to a device for correcting a receiver signal which is associated with an emission signal transmitted in a distorted transmission system. The emission signal comprises periods which can be determined by analyzing the received signal wherein determined properties are exhibited which are suitable for adjusting the correction. According to one embodiment, the device comprises a component for adjusting the correction based upon an analysis of the received signal and a component for monitoring and enabling the adjusting component when the received signal associated with the transmission signal exhibits certain characteristics.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: March 4, 2008
    Assignee: Infineon Technologies AG
    Inventors: Lajos Gazsi, Matthias Schoebinger
  • Patent number: 7263604
    Abstract: The invention relates to a heterogeneous parallel multithread processor (1) with shared contexts which has a plurality (M) of parallel-connected standard processor root unit types (2p; p? [1, . . . , M]), where each respective standard processor root unit type (2p) has at least one or more (K) parallel-connected standard processor root units (2pq; q? [1, . . . , K]) for instruction execution of program instructions from various threads (T), each standard processor root unit type (2p) having N local context memories (32pt) which each buffer-store part of a current processor state for a thread. The multithread processor (1) also has a plurality (N) of global context memories (3t; t? [1, . . . , N]) which each buffer-store part of a current processor state for a thread, and a thread control unit (4) which can connect any standard processor root unit (2pq) to any global context memory (3t).
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: August 28, 2007
    Assignee: Infineon Technologies AG
    Inventors: Lajos Gazsi, Jinan Lin, Soenke Mehrgardt, Xiaoning Nie
  • Publication number: 20070030939
    Abstract: A digital phase locked loop has a digitally controlled oscillator for generating an output frequency, a phase detector device for detecting the phase difference between a reference frequency and an output frequency of the oscillator, said phase detector device containing a delta-sigma frequency decision maker, and a digital loop filter, connected downstream of the phase detector device, for actuating the digitally controlled oscillator.
    Type: Application
    Filed: August 9, 2006
    Publication date: February 8, 2007
    Inventor: Lajos Gazsi