Patents by Inventor Laurence Douglas Lewicki

Laurence Douglas Lewicki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6535054
    Abstract: A band-gap reference circuit with offset cancellation is provided that includes a differential amplifier circuit. The differential amplifier circuit includes a first input node and a second input node. The first input node is operable to receive a first input signal. The second input node is operable to receive a second input signal. The band-gap reference circuit is operable to alternate between a first state and a second state based on a specified duty cycle. The first input node is an inverting node and the second input node is a non-inverting node in the first state, and the first input node is a non-inverting node and the second input node is an inverting node in the second state. The differential amplifier circuit is operable to generate an output signal based on a difference between the first and second input signals.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: March 18, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Vijaya G. Ceekala, Laurence Douglas Lewicki, James B. Wieser
  • Patent number: 6351506
    Abstract: A switched capacitor filter circuit having reduced offsets and providing offset compensation when used in a closed feedback loop includes a chopper stabilized amplified filter circuit which amplifies and low pass filters its input data signal to produce an output signal with an out of band signal frequency component which is at the chop signal frequency and represents an offset and 1/f noise of the chopper stabilized amplified filter circuit. An output switched capacitor filter circuit which is synchronized with the chopper stabilized amplified filter circuit filters this signal with a stopband filter frequency response that virtually eliminates such out of band signal frequency component. When used in a closed feedback loop, this filtered signal is used to generate an offset compensation signal that corresponds to the residual offset within the output signal resulting from the amplifying and filtering of the input data signal.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: February 26, 2002
    Assignee: National Semiconductor Corporation
    Inventor: Laurence Douglas Lewicki
  • Patent number: 6285311
    Abstract: A switched capacitor filter circuit having reduced offsets and providing offset compensation when used in a closed feedback loop includes a chopper stabilized amplified filter circuit which amplifies and low pass filters its input data signal to produce an output signal with an out of band signal frequency component which is at the chop signal frequency and represents an offset and 1/f noise of the chopper stabilized amplified filter circuit. An output switched capacitor filter circuit which is synchronized with the chopper stabilized amplified filter circuit filters this signal with a stopband filter frequency response that virtually eliminates such out of band signal frequency component. The resulting output signal is then converted to a digital signal by an analog-to-digital conversion (ADC) circuit.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: September 4, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Laurence Douglas Lewicki
  • Patent number: 6285231
    Abstract: A low power reference buffer includes a new amplifier design with very large transconductance and high frequency non-dominant poles and a triple bonding scheme to a large off-chip capacitor that avoids the problems related to the lead wire inductance.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: September 4, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Ion E. Opris, Laurence Douglas Lewicki
  • Patent number: 6259313
    Abstract: A chopper-stabilized telescopic differential amplifier circuit with an input signal switching matrix and an output signal switching matrix. Complementary nonoverlapping chop control signals for the switching matrices cause the inverse and noninverse input and output terminals of the circuit to alternately connect to the inverse and noninverse terminals of the internal differential amplifier. Common mode feedback is also provided in the form of synchronized switched capacitances coupling the output terminals of the circuit to a bias circuit for the internal differential amplifier. The internal differential amplifier includes a secondary bias circuit which maintains respective portions of the two circuit branches of the differential amplifier in constantly on bias states.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: July 10, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Laurence Douglas Lewicki
  • Patent number: 6191648
    Abstract: A switched-capacitor cosine filter circuit includes a differential amplifier and a switched-capacitor circuit. A set of control signals cause the switched-capacitor circuit to selectively couple the inputs and output of the differential amplifier thereby producing a switched input signal for the differential amplifier. During alternating states of the control signals, the switched-capacitor cosine filter circuit samples the input signal as a noninverting and inverting integrator circuit.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: February 20, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Laurence Douglas Lewicki
  • Patent number: 6191637
    Abstract: An integrated switched capacitor bias circuit for generating a reference signal which is proportional to absolute temperature, a capacitance and a clock signal frequency. A current mirror circuit generates a primary current and a mirrored current. Under the control of a clock signal, a switched capacitor circuit uses the mirrored current to constantly accumulate charges on primary capacitor while also alternately sharing such charges with and then discharging one of two additional capacitors. The magnitude of the current drawn by the switched capacitor circuit is a factor of the junction area of a diode and absolute temperature. To maintain equality of the primary and mirrored currents, a node voltage within the current mirror circuit is monitored by a bias circuit which provides a bias signal for controlling the current mirror circuit.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: February 20, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Laurence Douglas Lewicki, Shu-Ing Ju
  • Patent number: 6054886
    Abstract: A low power reference buffer includes a new amplifier design with very large transconductance and high frequency non-dominant poles and a triple bonding scheme to a large off-chip capacitor that avoids the problems related to the lead wire inductance.
    Type: Grant
    Filed: September 18, 1997
    Date of Patent: April 25, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Ion E. Opris, Laurence Douglas Lewicki
  • Patent number: 6026127
    Abstract: An autozero method and system that cancels offset for use in an AMI or like system and that operates while data is being transmitted and does not require a retraining sequence. The system applies the offset correction feedback in a unique way inside the traditional feedback loop. The system also provides a unique method of introducing offset correction into an analog feedback loop prior to the last gain stage such that the offset cancellation point is inside the feedback loop. This allows a straight forward implementation which does not have to compensate for the offset change due to the gain of the last stage. A digital control system allows the AGC and the autozero to be active in the same feedback loop and to interact with no adverse affects during the transmission of data.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: February 15, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Laurence Douglas Lewicki, George Edmond Seiler
  • Patent number: 5929699
    Abstract: An active RC integrator filter with finite operational amplifier bandwidth can be compensated by biasing the operational amplifier input stage such that its transconductance becomes a function of the resistance. Thereafter, by inserting another resistance of the same material in series with the integrating capacitor, a zero results in the overall transfer function of the filter according to the present invention. In this manner, the passband peaking of the active RC integrator filter resulting from the integrator phase shift can be avoided.
    Type: Grant
    Filed: December 15, 1997
    Date of Patent: July 27, 1999
    Assignee: National Semiconductor Corporation
    Inventor: Laurence Douglas Lewicki
  • Patent number: 5929796
    Abstract: A self-calibrating reversible pipeline analog to digital converting architecture configured to convert an input analog signal to an output digital signal and further to convert an input digital signal to an output analog signal is disclosed. The reversible pipeline architecture self-calibrates to compensate for adverse effects upon the linearity during signal conversion using a digital correction procedure. The same digital correction coefficients are used during both analog to digital conversion as well as during digital to analog conversion. The self-calibrating reversible converting architecture includes a reduced gain stage to create the necessary redundancy for the digital correction. Furthermore, the self-calibrating reversible converting architecture includes an overflow reduction stage to generate redundancy for the digital correction.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: July 27, 1999
    Assignee: National Semiconductor Corporation
    Inventors: Ion E. Opris, Laurence Douglas Lewicki, Lee Stoian