Patents by Inventor Lawrence C. Gunn
Lawrence C. Gunn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7116881Abstract: A standard CMOS process is modified to fabricate optical, optoelectronic and electronic devices at the same time on a monolithic integrated circuit. A polysilicon strip loaded waveguide is used as an example to illustrate the invention. The waveguide has a three layer core made of a polysilicon strip on a silicon slab with a silicon dioxide layer between the strip and the slab. In a standard CMOS process, a layer of metallic salicide is deposited for metallic contacts for electronic components, such as transistors. In the present invention, prior to the deposition of the salicide, a salicide blocking layer is selectively deposited for protecting silicon waveguide against damages. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide.Type: GrantFiled: July 7, 2005Date of Patent: October 3, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7116853Abstract: High speed optical modulators can be made of a reverse biased lateral PN diode formed in a silicon rib optical waveguide disposed on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a reverse biased lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Prior art forward biased PN and PIN diode modulators have been relatively low speed devices.Type: GrantFiled: August 11, 2004Date of Patent: October 3, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Roger Koumans, Bing Li, Guo Liang Li, Thierry J. Pinguet
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Patent number: 7095936Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical devices such as the core of an optical waveguide or a light scatterer will damage the devices and prevent the passage of light through those sections of the devices. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 14, 2005Date of Patent: August 22, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7085443Abstract: High speed optical modulators can be made of a lateral PN diode formed in a silicon optical waveguide, disposed on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Each of the doped regions can have a stepped or gradient doping profile within it or several doped sections with different doping concentrations. Forming the doped regions of a PN diode modulator with stepped or gradient doping profiles can optimize the trade off between the series resistance of the PN diode and the optical loss in the center of the waveguide due to the presence of dopants.Type: GrantFiled: August 11, 2004Date of Patent: August 1, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Roger Koumans, Bing Li, Guo Liang Li, Thierry J. Pinguet
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Patent number: 7082247Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: August 29, 2005Date of Patent: July 25, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Jeremy Witzens, Zhen-Li Ji
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Patent number: 7082246Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: July 25, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7082245Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: July 25, 2006Assignee: Luxtern, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7079742Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: July 18, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7072556Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: August 29, 2005Date of Patent: July 4, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Bing Li
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Patent number: 7068887Abstract: A polarization splitting grating coupler (PSGC) connects an optical signal from an optical element, such as a fiber, to an optoelectronic integrated circuit. The PSGC separates a received optical signal into two orthogonal polarizations and directs the two polarizations to separate waveguides on an integrated circuit. Each of the two separated polarizations can then be processed, as needed for a particular application, by the integrated circuit. A PSGC can also operate in the reverse direction, and couple two optical signals from an integrated circuit to two respective orthogonal polarizations of one optical output signal sent off chip to an optical fiber.Type: GrantFiled: October 26, 2005Date of Patent: June 27, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Jeremy Witzens
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Patent number: 7058273Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 14, 2005Date of Patent: June 6, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7054533Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: May 30, 2006Assignee: Luxtera, IncInventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7054534Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical elements such as the core of an optical waveguide or a light scatterer will damage the elements and prevent the passage of light through those sections of the elements. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 15, 2005Date of Patent: May 30, 2006Assignee: Luxtera, IncInventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7046894Abstract: In a standard CMOS process, a layer of metallic salicide can be deposited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into optical devices such as the core of an optical waveguide or a light scatterer will damage the devices and prevent the passage of light through those sections of the devices. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide or a light scatterer, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide and a light scatterer.Type: GrantFiled: July 14, 2005Date of Patent: May 16, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7046895Abstract: Optoelectronic devices of the present invention include several embodiments of an electronically active optical waveguide made of a strip loaded waveguide with a lateral, self-aligned diode fabricated in a layer of silicon. A voltage applied across the diode changes the free carrier density in a portion of the active waveguide, which can change the refractive index in that portion of the waveguide. Changing the refractive index can cause a phase shift of an optical signal propagating down the waveguide and this effect can be used to control the optical signal. Changing the free carrier density can also change the amount of optical attenuation in a section of an active waveguide. Optoelectronic devices such as: modulators, attenuators, switches, beam diverters, tunable filters and other devices can be fabricated on a standard SOI substrate (silicon on insulator), which is typically used in the fabrication of CMOS integrated circuits.Type: GrantFiled: November 8, 2005Date of Patent: May 16, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Bing Li, Thierry J. Pinguet, David Press, Maxime Jean Rattier
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Patent number: 7046896Abstract: Optoelectronic devices of the present invention include several embodiments of an electronically active optical waveguide made of a strip loaded waveguide with a lateral, self-aligned diode fabricated in a layer of silicon. A voltage applied across the diode changes the free carrier density in a portion of the active waveguide, which can change the refractive index in that portion of the waveguide. Changing the refractive index can cause a phase shift of an optical signal propagating down the waveguide and this effect can be used to control the optical signal. Changing the free carrier density can also change the amount of optical attenuation in a section of an active waveguide. Optoelectronic devices such as: modulators, attenuators, switches, beam diverters, tunable filters and other devices can be fabricated on a standard SOI substrate (silicon on insulator), which is typically used in the fabrication of CMOS integrated circuits.Type: GrantFiled: November 8, 2005Date of Patent: May 16, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Bing Li, Thierry J. Pinguet, David Press, Maxime Jean Rattier
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Patent number: 7039258Abstract: High speed optical modulators can be made of k modulators connected in series disposed on one of a variety of semiconductor substrates. An electrical signal propagating in a microwave transmission line is tapped off of the transmission line at regular intervals and is amplified by k distributed amplifiers. Each of the outputs of the k distributed amplifiers is connected to a respective one of the k modulators. Distributed amplifier modulators can have much higher modulating speeds than a comparable lumped element modulator, due to the lower capacitance of each of the k modulators. Distributed amplifier modulators can have much higher modulating speeds than a comparable traveling wave modulator, due to the impedance matching provided by the distributed amplifiers.Type: GrantFiled: August 13, 2004Date of Patent: May 2, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Roger Koumans, Bing Li, Guo Liang Li, Thierry J. Pinguet
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Patent number: 7027673Abstract: An apparatus and method for splitting a received optical signal into its orthogonal polarizations and sending the two polarizations on separate dual integrated waveguides to other systems on chip for further signal processing. The present invention provides an apparatus and method for facilitating the processing of optical signals in planar waveguides received from optical fibers.Type: GrantFiled: June 19, 2003Date of Patent: April 11, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier
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Patent number: 7024066Abstract: This application describes, among others, wafer designs, testing systems and techniques for wafer-level optical and optoelectronic testing by coupling probe light to/from the top of the wafer. In the described exemplary implementations, wafers are designed with one or more optical alignment features or structures. The alignment structures are alongside the devices to be tested, but are easier to find or locate by optical means, than the devices to be tested. An optical diffraction grating structure such as a Littrow grating may be used as reflective alignment structures. (FIG. 6B and paragraph 56.) A Littrow grating as an alignment structure produces a retro-reflection. A Littrow grating is a one-port optical device, with input and output beams going along the same path. Various exemplary implementations are shown in FIGS. 3C, 5, 6A, 6B, 7A and 7B and described in paragraphs 18–21, 39–40 and 53–64.Type: GrantFiled: December 17, 2004Date of Patent: April 4, 2006Assignee: Luxtera, Inc.Inventors: Roman Malendevich, Myles Sussman, Lawrence C. Gunn, III
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Patent number: 7010208Abstract: A standard CMOS process is used to fabricate optical and electronic devices at the same time on a monolithic integrated circuit. In the process, a layer of metallic salicide can be depsoited on those selected portions of an integrated circuit, where it is desired to have metallic contacts for electronic components, such as transistors. The deposition of a salicide into the core of an optical waveguide will damage the waveguide and prevent the passage of light through that section of the waveguide. Prior to the deposition of the salicide, a salicide blocking layer is deposited on those parts of an integrated circuit, such as on an optical waveguide, which are to be protected from damage by the deposition of salicide. The salicide blocking layer is used as one layer of the cladding of a silicon waveguide.Type: GrantFiled: June 24, 2003Date of Patent: March 7, 2006Assignee: Luxtera, Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Giovanni Capellini
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Patent number: 5010139Abstract: An antistatic polymeric composition consisting of at least one antistatic additive of an ethylene oxide copolymer in the range of from about 3% to about 30% by weight and being a solid, nonionic material and having a dilution solution viscosity of greater than 0.25 g/ml and preferably having an average molecular weight greater than 20,000; and a polymeric material in the range from about 70% to about 97% by weight. The ethylene oxide copolymer comprises ethylene oxide in the range of from about 5% to about 95% by weight and at least 1 comonomer selected the group consisting of cyclic ethers, cyclic acetals, and cyclic esters, in the range of from about 95% to about 5% by weight. The polymeric material can be any thermoplastic, thermoplastic elastomer, or elastomer including ABS, ASA, polyamides, PBT, PET, PETG, PMMA, PUR, PVC, CPVC, PC, POM, POP, SMA, and SAN.Type: GrantFiled: June 14, 1989Date of Patent: April 23, 1991Assignee: The B. F. Goodrich CompanyInventor: Simon H. P. Yu