Abstract: An improved method of operation for a microprocessor-based controller wherein a frequency limited counter can be used to generate low frequency PWM signals having on and/or off periods that exceed the period of the microprocessor's free-running counter. The improved method of operation involves comparing the requested PWM period (on or off) to the counter period, and determining if multiple counter periods are required to generate the requested PWM period. If multiple counter periods are required, the controller configures the PWM output port to maintain its current logic level until the requested period has timed out. In this way, the microprocessor can accurately generate the requested low frequency PWM output signals without requiring any hardware modifications.