Patents by Inventor Leon Van Der Dussen

Leon Van Der Dussen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Capacitive sampling circuit
    Patent number: 10958282
    Abstract: A capacitive sampling circuit comprises: a first-differential-input-terminal, configured to receive a first one of a pair of differential-input-signals; a second-differential-input-terminal, configured to receive the other one of the pair of differential-input-signals; a capacitive-circuit-output-terminal, configured to provide a sampled-output-signal; a plurality of first-sampling-capacitors, each having a first-plate and a second-plate; a plurality of reference-voltage-terminals, each configured to receive a respective reference-voltage; and a first-capacitor-first-plate-switching-block configured to selectively connect the first-plate of each of the plurality of first-sampling-capacitors to either: (i) the first-differential-input-terminal; or (ii) a respective one of the plurality of reference-voltage-terminals; and a first-capacitor-second-plate-switch, configured to selectively connect or disconnect the second-plate of each of the plurality of first-sampling-capacitors to the second-differential-input-t
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: March 23, 2021
    Assignee: NXP B.V.
    Inventors: Erik Olieman, Alphons Litjes, Leon van der Dussen
  • CAPACITIVE SAMPLING CIRCUIT
    Publication number: 20200313689
    Abstract: A capacitive sampling circuit comprises: a first-differential-input-terminal, configured to receive a first one of a pair of differential-input-signals; a second-differential-input-terminal, configured to receive the other one of the pair of differential-input-signals; a capacitive-circuit-output-terminal, configured to provide a sampled-output-signal; a plurality of first-sampling-capacitors, each having a first-plate and a second-plate; a plurality of reference-voltage-terminals, each configured to receive a respective reference-voltage; and a first-capacitor-first-plate-switching-block configured to selectively connect the first-plate of each of the plurality of first-sampling-capacitors to either: (i) the first-differential-input-terminal; or (ii) a respective one of the plurality of reference-voltage-terminals; and a first-capacitor-second-plate-switch, configured to selectively connect or disconnect the second-plate of each of the plurality of first-sampling-capacitors to the second-differential-input-t
    Type: Application
    Filed: March 10, 2020
    Publication date: October 1, 2020
    Inventors: Erik Olieman, Alphons Litjes, Leon van der Dussen
  • Low power high dynamic range sigma-delta modulator
    Patent number: 8736473
    Abstract: A low power, high dynamic range sigma-delta modulator comprises a quantizer followed by a digital integrator for generating an integrated digital signal from a quantized signal. The output of the digital integrator is coupled to a digital-to-analog converter in the feedback loop of the sigma-delta modulator.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: May 27, 2014
    Assignee: NXP, B.V.
    Inventors: Carel Dijkmans, Robert van Veldhoven, Ben Kup, Leon van der Dussen, Harry Neuteboom
  • LOW POWER HIGH DYNAMIC RANGE SIGMA-DELTA MODULATOR
    Publication number: 20120038500
    Abstract: A low power, high dynamic range sigma-delta modulator comprises a quantizer followed by a digital integrator for generating an integrated digital signal from a quantized signal. The output of the digital integrator is coupled to a digital-to-analog converter in the feedback loop of the sigma-delta modulator.
    Type: Application
    Filed: August 16, 2010
    Publication date: February 16, 2012
    Applicant: NXP B.V.
    Inventors: Carel Dijkmans, Robert Van Veldhoven, Ben Kup, Leon Van Der Dussen, Harry Neuteboom