Abstract: Techniques are provided for containing magnetic fields generated by an integrated switching package and for reducing electromagnetic interference generated from an integrated switching package.

Abstract: Various examples are directed to a solar power electrolyzer system comprising a first electrolyzer stack, a second electrolyzer stack, a first converter and a first converter controller. The first electrolyzer stack may be electrically coupled in series with a photovoltaic array. The first converter may be electrically coupled in series with the first electrolyzer stack and electrically coupled in series with the photovoltaic array. The second electrolyzer stack electrically may be coupled at an output of the first converter. The first converter controller may be configured to control a current gain of the first converter.

Abstract: Various examples are directed to a solar power electrolyzer system comprising a first electrolyzer stack, a second electrolyzer stack, a first converter and a first converter controller. The first electrolyzer stack may be electrically coupled in series with a photovoltaic array. The first converter may be electrically coupled in series with the first electrolyzer stack and electrically coupled in series with the photovoltaic array. The second electrolyzer stack electrically may be coupled at an output of the first converter. The first converter controller may be configured to control a current gain of the first converter.

Abstract: A lateral GaN superjunction transistor or switching device that is configured to have higher breakdown voltage and lower on-resistance as compared to other GaN-based switching devices. The lateral GaN superjunction transistor includes a heavily doped buried implant region (hereinafter, “buried implant region”) in the substrate underlying the transistor that operates as backside field plate (BFP) to control or reduce gate-drain electric fields at the surface of the transistor, thereby enabling the transistor to operate at higher voltages while reducing charge trapping and breakdown effects. The lateral GaN superjunction transistor operates similarly to a vertical silicon superjunction FET to enable operation of the transistor at higher voltages than other GaN or semiconductor devices, such as to enable the construction of faster or higher power electronic circuits.

Abstract: A space efficient planar transformer can include a coupled inductor circuit that can include a metallic core, a first planar winding comprising a conductive coil having an electrical path encircling a first post of the metallic core, and a second planar winding configured to magnetically couple with the first winding via the metallic core. The second planar winding can have multiple portions. A portion of the second winding can include a first sub-portion comprising a single U-shaped planar conductive trace wrapped about the first post and a second sub-portion comprising a single U-shaped planar conductive trace wrapped about the first post. A layout of the first sub-portion can be oriented opposite a layout of the second sub-portion.

Abstract: Various examples are directed to a solar power electrolyzer system comprising a first electrolyzer stack, a second electrolyzer stack, a first converter and a first converter controller. The first electrolyzer stack may be electrically coupled in series with a photovoltaic array. The first converter may be electrically coupled in series with the first electrolyzer stack and electrically coupled in series with the photovoltaic array. The second electrolyzer stack electrically may be coupled at an output of the first converter. The first converter controller may be configured to control a current gain of the first converter.

Abstract: A space efficient planar transformer can include a coupled inductor circuit that can include a metallic core, a first planar winding comprising a conductive coil having an electrical path encircling a first post of the metallic core, and a second planar winding configured to magnetically couple with the first winding via the metallic core. The second planar winding can have multiple portions. A portion of the second winding can include a first sub-portion comprising a single U-shaped planar conductive trace wrapped about the first post and a second sub-portion comprising a single U-shaped planar conductive trace wrapped about the first post. A layout of the first sub-portion can be oriented opposite a layout of the second sub-portion.

Abstract: Techniques are provided for containing magnetic fields generated by an integrated switching package and for reducing electromagnetic interference generated from an integrated switching package.

Abstract: Techniques to achieve higher power/shorter pulses with a laser diode. By initially applying a static reverse bias across the laser diode, the laser diode can turn on at a larger inductor current. When the laser diode is initially reverse biased, depletion charge and diffusion charge can be populated before the laser diode will lase. This causes the laser diode to initially turn on at a larger inductor current, which will reduce the rise time, thereby achieving higher power/shorter pulses.

Abstract: Techniques are provided for containing magnetic fields generated by an integrated switching package and for reducing electromagnetic interference generated from an integrated switching package.

Abstract: Techniques to achieve higher power/shorter pulses with a laser diode. By initially applying a static reverse bias across the laser diode, the laser diode can turn on at a larger inductor current. When the laser diode is initially reverse biased, depletion charge and diffusion charge can be populated before the laser diode will lase. This causes the laser diode to initially turn on at a larger inductor current, which will reduce the rise time, thereby achieving higher power/shorter pulses.

Abstract: Techniques are provided for containing magnetic fields generated by an integrated switching package and for reducing electromagnetic interference generated from an integrated switching package.

Abstract: A predicted ripple in the feedback voltage of a switching converter is generated, based on the ripple over a certain number of recent switching cycles. The DC portion of the feedback voltage is filtered out. This predicted feedback voltage ripple is then added to a fixed reference voltage to create a compensated reference voltage. The compensated reference voltage is applied to the non-inverting input of an error amplifier, and the feedback voltage (having a DC component and ripple) is applied to the inverting input of the error amplifier. Thus, substantially the same ripple component is applied to both inputs and cancels out. Therefore, the output of the error amplifier is not affected by the ripple in the feedback voltage, and a non-rippling control voltage is generated by the error amplifier. As a result, the gain-bandwidth product of the converter can be increased for faster response to transients.

Abstract: A predicted ripple in the feedback voltage of a switching converter is generated, based on the ripple over a certain number of recent switching cycles. The DC portion of the feedback voltage is filtered out. This predicted feedback voltage ripple is then added to a fixed reference voltage to create a compensated reference voltage. The compensated reference voltage is applied to the non-inverting input of an error amplifier, and the feedback voltage (having a DC component and ripple) is applied to the inverting input of the error amplifier. Thus, substantially the same ripple component is applied to both inputs and cancels out. Therefore, the output of the error amplifier is not affected by the ripple in the feedback voltage, and a non-rippling control voltage is generated by the error amplifier. As a result, the gain-bandwidth product of the converter can be increased for faster response to transients.

Abstract: A predicted ripple in the feedback voltage of a switching converter is generated, based on the ripple over a certain number of recent switching cycles. The DC portion of the feedback voltage is filtered out. This predicted feedback voltage ripple is then added to a fixed reference voltage to create a compensated reference voltage. The compensated reference voltage is applied to the non-inverting input of an error amplifier, and the feedback voltage (having a DC component and ripple) is applied to the inverting input of the error amplifier. Thus, substantially the same ripple component is applied to both inputs and cancels out. Therefore, the output of the error amplifier is not affected by the ripple in the feedback voltage, and a non-rippling control voltage is generated by the error amplifier. As a result, the gain-bandwidth product of the converter can be increased for faster response to transients.

Abstract: An integrated circuit package may include a semiconductor die, a heat spreader, and encapsulation material. The semiconductor die may contain an electronic circuit and exposed electrical connections to the electronic circuit. The heat spreader may be thermally-conductive and may have a first outer surface and a second outer surface substantially parallel to the first outer surface. The first outer surface may be affixed to all portions of a silicon side of the semiconductor die in a thermally-conductive manner. The encapsulation material may be non-electrically conductive and may completely encapsulate the semiconductor die and the heat spreader, except for the second surface of the heat spreader. The second surface of the heat spreader may be solderable and may form part of an exterior surface of the integrated circuit package.

Abstract: An integrated circuit package may include a semiconductor die, a heat spreader, and encapsulation material. The semiconductor die may contain an electronic circuit and exposed electrical connections to the electronic circuit. The heat spreader may be thermally-conductive and may have a first outer surface and a second outer surface substantially parallel to the first outer surface. The first outer surface may be affixed to all portions of a silicon side of the semiconductor die in a thermally-conductive manner. The encapsulation material may be non-electrically conductive and may completely encapsulate the semiconductor die and the heat spreader, except for the second surface of the heat spreader. The second surface of the heat spreader may be solderable and may form part of an exterior surface of the integrated circuit package.

Abstract: A flipchip package may include a semiconductor die, a heat spreader, and encapsulation material. The semiconductor die may contain an electronic circuit and exposed electrical connections to the electronic circuit. The heat spreader may be thermally-conductive and may have a first outer surface and a second outer surface substantially parallel to the first outer surface. The first outer surface may be affixed to all portions of a silicon side of the semiconductor die in a thermally-conductive manner. The encapsulation material may be non-electrically conductive and may completely encapsulate the semiconductor die and the heat spreader, except for the second surface of the heat spreader. The second surface of the heat spreader may be solderable and may form part of an exterior surface of the flipchip package.

Abstract: This invention uses new switching regulator structures to split single magnetic loops into multiple magnetic loops, with linked opposing magnetic fields, to cause a cancelling effect, resulting in a much lower overall magnetic field. This results in lower EMI. In one embodiment, synchronously switched transistors are divided up into parallel topside transistors and parallel bottomside transistors. The topside transistors are positioned to oppose the bottomside transistors, and bypass capacitors are connected between the pairs to create a plurality of current loops. The components are arranged to form a mirror image of the various current loops so that the resulting magnetic fields are in opposite directions and substantially cancel each other out. Creating opposite current loops may also be achieved by forming the conductors and components in a figure 8 pattern with a cross-over point.

Abstract: This invention uses new switching regulator structures to split single magnetic loops into multiple magnetic loops, with linked opposing magnetic fields, to cause a cancelling effect, resulting in a much lower overall magnetic field. This results in lower EMI. In one embodiment, synchronously switched transistors are divided up into parallel topside transistors and parallel bottomside transistors. The topside transistors are positioned to oppose the bottomside transistors, and bypass capacitors are connected between the pairs to create a plurality of current loops. The components are arranged to form a mirror image of the various current loops so that the resulting magnetic fields are in opposite directions and substantially cancel each other out. Creating opposite current loops may also be achieved by forming the conductors and components in a FIG. 8 pattern with a cross-over point.